Cache hierarchy and memory subsystem of the AMD opteron processor

IEEE Micro

Volumn 30, Issue 2, 2010, Pages 16-29

  Conway, Pat ^a   Kalyanasundharam, Nathan ^a   Donley, Gregg ^a   Lepak, Kevin ^a   Hughes, Bill ^a  

^a ADVANCED MICRO DEVICES   (United States)

Author keywords

Blade server; Cache; Cache directory; HyperTransport3 technology; Memory hierarchy; Multiprocessor; Power envelopes; Probe filter; Processor; System interconnect; X86 64

Indexed keywords

BLADE SERVER; BLADE SERVERS; CACHE DIRECTORY; MEMORY HIERARCHY; PROCESSOR SYSTEMS;

COMPUTER ARCHITECTURE; MULTIPROCESSING SYSTEMS; NANOTECHNOLOGY; NETWORK ARCHITECTURE; PROBES; SERVERS;

CACHE MEMORY;

EID: 77951200277     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2010.31     Document Type: Article

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