A 0.35μm sub-ns wake-up time ON-OFF switchable LVDS driver-receiver chip I/O pad pair for rate-dependent power saving in AER bit-serial links

IEEE Transactions on Biomedical Circuits and Systems

Volumn 6, Issue 5, 2012, Pages 486-497

  Zamarreno Ramos, Carlos ^a   Serrano Gotarredona, Teresa ^a   Linares Barranco, Bernabé ^a  

^a INSTITUTO DE MICROELECTRÓNICA DE SEVILLA   (Spain)

Author keywords

Address event representation (AER); asynchronous circuits; asynchronous communications; event driven processing; low voltage differential signaling (LVDS); LVDS drivers; Manchester encoding; neuromorphic circuits and systems; serial AER; serial interchip communication

Indexed keywords

ADDRESS-EVENT REPRESENTATION; ASYNCHRONOUS CIRCUITS; ASYNCHRONOUS COMMUNICATION; INTERCHIP COMMUNICATIONS; LOW VOLTAGE DIFFERENTIAL SIGNALING; MANCHESTER; NEUROMORPHIC CIRCUITS; SERIAL AER;

ASYNCHRONOUS SEQUENTIAL LOGIC; COUPLED CIRCUITS;

LOGIC CIRCUITS;

ARTICLE; ARTIFICIAL NEURAL NETWORK; BIOMEDICAL ENGINEERING; EQUIPMENT; EQUIPMENT DESIGN; SEMICONDUCTOR; SIGNAL PROCESSING; STATISTICS;

BIOMEDICAL ENGINEERING; EQUIPMENT DESIGN; NEURAL NETWORKS (COMPUTER); SEMICONDUCTORS; SIGNAL PROCESSING, COMPUTER-ASSISTED;

EID: 84870533772     PISSN: 19324545     EISSN: None     Source Type: Journal    
DOI: 10.1109/TBCAS.2012.2186136     Document Type: Article

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