Neuromorphic implementation of orientation hypercolumns

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 52, Issue 6, 2005, Pages 1049-1060

  Choi, Thomas Yu Wing ^a   Merolla, Paul A ^b   Arthur, John V ^b   Boahen, Kwabena A ^b   Shi, Bertram E ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^b UNIVERSITY OF PENNSYLVANIA   (United States)

Author keywords

Address event representation (AER); Gabor filter; Image processing; Mixed analog digital integrated circuits; Neural chips; Neuromorphic engineering; Visual cortex

Indexed keywords

ARRAYS; ELECTRIC FILTERS; FOURIER TRANSFORMS; IMAGE PROCESSING; MULTICHIP MODULES; SEMICONDUCTING SILICON;

ADDRESS EVENT REPRESENTATION (AER); GABOR FILTER; MIXED ANALOG-DIGITAL INTEGRATED CIRCUITS; NEURAL CHIPS; NEUROMORPHIC ENGINEERING; VISUAL CORTEX;

INTEGRATED CIRCUITS;

EID: 22144440574     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.849136     Document Type: Article

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