Physical insight toward heat transport and an improved electrothermal modeling framework for FinFET architectures

IEEE Transactions on Electron Devices

Volumn 59, Issue 5, 2012, Pages 1353-1363

  Shrivastava, Mayank ^a   Agrawal, Manish ^b,c   Mahajan, Sunny ^b   Gossner, Harald ^a   Schulz, Thomas ^a   Sharma, Dinesh Kumar ^b   Rao, V Ramgopal ^b  

^a INTEL CORPORATION   (United States)

^b INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^c INTEL TECHNOLOGY INDIA PVT LTD   (India)

Author keywords

BEOL reliability; electrothermal modeling; ESD; extremely thin silicon on insulator (SOI) (ETSOI); fin shaped field effect transistor (FET) (FinFET); thermal fail

Indexed keywords

BULK FINFET; ELECTRO-THERMAL MODELING; ESD; FINFET DEVICES; FLUX PATH; FRONT END OF THE LINES; HEAT TRANSPORT; LATTICE HEATING; NON-PLANAR DEVICES; NORMAL OPERATING CONDITIONS; ON CHIPS; SELF-HEATING; SILICON-ON-INSULATORS; TECHNOLOGY DESIGNS; THERMAL FAIL; THERMAL FAILURE; THIN SOI;

FIELD EFFECT TRANSISTORS; FINS (HEAT EXCHANGE); HEAT FLUX; INTEGRATED CIRCUITS; LOGIC CIRCUITS; THREE DIMENSIONAL;

MODELS;

EID: 84860240447     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2012.2188296     Document Type: Article

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