Electro-thermal analysis of multi-fin devices

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 16, Issue 7, 2008, Pages 816-829

  Swahn, Brian ^a,b   Hassoun, Soha ^a,c  

^a IEEE

^b ANALOG DEVICES INC   (United States)

^c Tufts University   (United States)

Author keywords

Electro thermal effects; FinFET; Integrated circuit (IC) design; Thermal analysis; VLSI

Indexed keywords

ARSENIC COMPOUNDS; COMPUTER SIMULATION; HEALTH; HEATING; MOS DEVICES; SENSITIVITY ANALYSIS; SUGAR (SUCROSE); THERMOANALYSIS; THERMOGRAPHY (TEMPERATURE MEASUREMENT);

AND GATES; CIRCUIT DESIGNS; DEVICE DIMENSIONS; ELECTROSTATIC CHARACTERISTICS; FIN HEIGHT; FIN SPACING; FIN WIDTHS; FINFETS; GATE OXIDE THICKNESS; GEOMETRIC PARAMETERS; INDIVIDUAL (PSS 544-7); NANO METER RANGE; NUMERICAL SIMULATIONS; PERFORMANCE CONSTRAINTS; SELF HEATING;

FINS (HEAT EXCHANGE);

EID: 48149084300     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2000455     Document Type: Article

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