MOS-based spin devices for reconfigurable logic

IEEE Transactions on Electron Devices

Volumn 54, Issue 5, 2007, Pages 961-976

  Tanaka, Masaaki ^a,c   Sugahara, Satoshi ^b  

^a UNIVERSITY OF TOKYO   (Japan)

^b TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^c JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

Nonvolatile memory; Reconfigurable logic; Spin MOSFET; Spin transistor

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES; MAGNETIZATION; MOSFET DEVICES; NONVOLATILE STORAGE;

RECONFIGURABLE LOGIC; SPIN MOSFET; SPIN TRANSISTOR;

MAGNETOELECTRONICS;

EID: 34247860905     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.894375     Document Type: Article

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