Subband structure engineering for realizing scaled CMOS with high performance and low power consumption

IEICE Transactions on Electronics

Volumn E85-C, Issue 5, 2002, Pages 1064-1072

  Takagi, Shin Ichi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

Inversion layer; Mobility; SOI; Strained Si; Subband

Indexed keywords

BAND STRUCTURE; CAPACITANCE MEASUREMENT; ELECTRIC CURRENT MEASUREMENT; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRON MOBILITY; ELECTRON TUNNELING; HOLE MOBILITY; MOSFET DEVICES; SEMICONDUCTOR DEVICE STRUCTURES; SILICON ON INSULATOR TECHNOLOGY; TWO DIMENSIONAL; VOLTAGE MEASUREMENT;

INVERSION LAYER MOBILITY; SUBBAND STRUCTURE; TUNNELING CURRENT;

CMOS INTEGRATED CIRCUITS;

EID: 0036581882     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (40)

1. Electronic properties of two-dimensional systems
2. Quantitative understanding of inversion-layer capacitance in Si MOSFETs
3. Characterization of inversion-layer capacitance of holes in Si MOSFETs
4. Impact of electron and hole inversion-layer capacitance on low voltage operation of scaled n- and p-MOSFET's
5. Self-consistent results for n-type Si inversion layers
6. Nonstationary electron/hole transport in sub-0.1 μm MOS devices: Correlation with mobility and low-power CMOS application
7. Silicon MOS transconductance scaling into the overshoot regime
8. On the mobility versus drain current relation for a nanoscale MOSFET
9. Subband structure engineering for performance enhancement of Si MOSFETs
10. Optimized design of subband structure in MOS inversion layer for realizing high performance and low power Si MOSFET's
11. Mobility enhancement of SOI MOSFETs due to subband modulation in ultra-thin SOI films
12. Phonon-limited inversion layer electron mobility in extremely thin Si layer of silicon-on-insulator metal-oxide-semiconductor field-effect transistor
13. Electron mobility enhancement in strained-Si N-type metal-oxide-semiconductor field-effect transistors
14. Comparative study of phonon- Limited mobility of 2 dimensional electrons in strained and unstrained Si MOSFETs
15. Strain dependence of the performance enhancement in strained-Si n-MOSFETs
16. Electron and hole mobility enhancement in strained-Si MOSFETs on SiGe-on-insulator substrates fabricated by SIMOX technology
17. Carrier mobility enhancement in strained Si-on-insulator fabricated by wafer bonding
18. Strained Si MOSFETs for high performance CMOS technology
19. Transconductance enhancement in deep submicron strained Si n-MOSFETs
20. Strained-Si-on-insulator (strained-SOI) MOSFETs - Concept, structures and device characteristics
21. On the reduction of direct tunneling leakage through ultra-thin gate oxides by a one-dimensional Schrodinger - Poisson solver
22. High performance strained-Si p-MOSFETs on SiGe-on- Insulator substrates fabricated by SIMOX technology
23. Advanced SOI-MOSFETs with strained-Si channel for high speed CMOS - Electron/hole mobility enhancement
24. Advance SOI p-MOSFET's with strained-Si channel on sigeon-insulator substrate fabricated by SIMOX technology
25. Advanced SOI p-channel MOSFET's with higher strain in Si channel using double SiGe heterostructures
26. x source structure
27. On the universality of inversion-layer mobility in Si MOSFET's (Part I) - Effect of substrate impurity concentration
28. Experimental evidence of quantum mechanical effects on electrical characteristics of ultra-thin body SOI MOSFETs
29. Subband structure and mobility of two-dimensional holes in strained Si/SiGe MOSFET's
30. Enhanced hole mobilities in surface-channel strained-Si p-MOSFETs
31. High-mobility strained-Si PMOSFET's
32. Hole mobility enhancement in strained-Si p-MOSFETs under high vertical field
33. Origin of hole mobility enhancement in strained-Si p-MOSFETs
34. Hole mobility improvement in silicon-on-insulator and bulk silicon transistors using local strain
35. Impact of strained-Si channel on CMOS circuit performance under sub-100 nm regime
36. Novel fully-depleted SiGe-On- Insulator pMOSFETs with high-mobility SiGe surface channels
37. Ultra-thin body PMOSFETs with selectively deposited Ge source/drain
38. Properties of semiconductor surface inversion layers in the electric quantum limit