Silicon technology tradeoffs for radio-frequency/mixed-signal "systems-on-a-chip"

IEEE Transactions on Electron Devices

Volumn 50, Issue 3, 2003, Pages 683-699

  Larson, Lawrence E ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Capacitor; HBT; Inductor; Linearity; Low noise amplifier (LNA); MOSFET; Noise figure; Power amplifier; RF CMOS; SiGe; Third order input referred intercept point (IIP3); Transceiver; Voltage controlled oscillator (VCO)

Indexed keywords

DIGITAL INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; FREQUENCY CONVERTERS; HETEROJUNCTION BIPOLAR TRANSISTORS; MICROPROCESSOR CHIPS; MICROWAVE CIRCUITS; MIXER CIRCUITS; SPURIOUS SIGNAL NOISE;

LOW NOISE AMPLIFICATION; LOW NOISE RECEIVER; MIXED SIGNAL SYSTEMS ON A CHIP; RADIO FREQUENCY SYSTEMS ON A CHIP;

SEMICONDUCTING SILICON;

EID: 0038207993     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.810482     Document Type: Article

References (91)

1. P. C. Davis, "Merits and requirements of a few RF architectures," in Proc. 1999 Bipolar/BiCMOS Circuits and Technology Meeting, Minneapolis, MN, Sept. 1999, pp. 62-66.
2. S. Redl, M. Weber, and M. Oliphant, An Introduction to GSM. Norwell, MA: Artech House, 1995.
3. B. Gilbert, "The design of Si/SiGe LNA's from the ground up," in IEEE BCTM Short Course Notes, 1996.
4. B. Razavi, "Design considerations for direct-conversion receivers," IEEE Trans. Circuits Syst. II, vol. 44, pp. 428-435, June 1997.
5. J. Groe and L. Larson, CDMA Mobile Radio Design. Norwell, MA: Artech House, June 2000.
6. 2 silicon area," in Proc. 2002 IEEE Int. Solid-State Circuits Conf., vol. 45, Feb. 2002, pp. 64-66.
7. T. Ohguro, T. Ishikawa, T. Kimura, S. Samata, A. Kawasaki, T. Nagano, T. Yoshitomi, and T. Toyoshima, "High performance digital-analog mixed device on an Si substrate with resistivity beyond 1 kΩ-cm," in IEDM Tech Dig., 2000, pp. 757-760.
8. R. H. Rasshofer, E. M. Biebl, K. M. Strohm, and J. F. Luy, "Long-term stability of passive millimeterwave circuits on high-resistivity silicon substrates," in Proc. 1999 IEEE MTT-S Int. Microwave Symp., vol. 2, pp. 585-588.
9. J. Burkhartz, M. Bartek, B. Rejaei, P. Sarro, A. Polyakov, N. Pham, E. Boullard, and K. Ng, "Substrate options and add-on process modules for monolithic RF silicon technology," in Proc. 2002 IEEE Bipolar Circuits and Technology Meeting, pp. 17-20.
10. J. Raskin, R. Gillon, J. Chen, D. Vanhoenacker-Janvier, and J. Colinge, "Accurate SOI MOSFET characterization at microwave frequencies for device performance optimization and analog modeling," IEEE Trans. Electron Devices, vol. 45, pp. 1017-1025, May 1998.
11. M. Stuber, M. Megahed, J. Lee, T. Kovayashi, and H. Domyo, "SOI CMOS with high-performance passive components for analog, RF, and mixed signal design," in Proc. 1998 IEEE Int. SOI Conf., pp. 99-100.
12. L. Nanver, H. van Zeijl, H. Schellevis, R. Mallee, J. Slabbekoorn, R. Dekker, and J. Slotboom, "Ultra-low-temperature low-ohmic contacts for SOA applications," in Proc. 1999 Bipolar/BiCMOS Circuits and Technology Meeting, pp. 137-140.
13. K. Han-Su, C. Kyuchul, X. Ya-Hong, M. Devincentis, T. Itoh, A. Becker, and K. Jenkins, "A porous Si based novel isolation technology for mixed-signal integrated circuits," in Proc. 2002 Symp. VLSI Technology, pp. 160-161.
14. J. Wu, J. Scholvin, J. del Alamo, and K. Jenkins, "A Faraday cage isolation structure for substrate crosstalk suppression," IEEE Microwave Wireless Components Lett., vol. 11, pp. 410-412, Oct. 2001.
15. N. Pham, P. Sarro, K. Ng, and J. Burghartz, "IC-compatible two-level bulk micromachining for RF silicon technology," in Proc. 30th Eur. Solid-State Device Research Conf., pp. 204-207.
16. P. van Zeijl, J. Eikenbroek, P. Vervoort, S. Setty, J. Tangenberg, G. Shipton, E. Kooistra, I. Keekstra, and D. Belot, "A Bluetooth radio in 0.18 μm CMOS," in Proc. 2002 IEEE Int. Solid-State Circuits Conf., vol. 45, Feb. 2002, pp. 86-87.
17. T for single-chip system solutions," in Proc. 2001 IEEE MTT-S Int. Microwave Symp., June 2001, pp. 1869-1872.
18. T. Blalack, Y. Leclercq, and C. Yue, "On-chip RF isolation techniques," in Proc. 2002 Bipolar/BiCMOS Circuits and Technology Meeting, Oct. 2002, pp. 205-211.
19. A. Cathelin, D. Saias, D. Belot, Y. Leclerq, and F. Clement, "Substrate parasitic extraction for RF integrated circuits," in Proc. Design Automation and Test in Europe, Mar. 2002, poster 4C-2.
20. T in a manufacturable technology," IEEE Electron Device Lett., vol. 23, pp. 258-260, May 2002.
21. A. Chatterjee, D. Mosher, S. Sridhar, Y. Kim, and M. Nandakumar, "Analog integration in a 0.35μm Cu metal pitch, 0.1μm gate length, low-power digital CMOS technology," in IEDM Tech. Dig., Dec. 2001, pp. 10.1.1-10.1.4.
22. MAX of heterojunction bipolar transistors," IEEE Trans. Electron Devices, vol. 46, pp. 301-309, Feb. 1999.
23. M. Rodwell, M. Urteaga, T. Mathew, D. Scott, D. Mensa, Q. Lee, J. Guthrie, Y. Betser, S. Martin, R. Smith, S. Krishnan, S. Long, R. Pullela, B. Agarwal, U. Bhattacharya, L. Samoska, and M. Dahlstrom, "Submicron scaling of HBTs," IEEE Trans. Electron Devices, vol. 48, pp. 2606-2624, Nov. 2001.
24. H. Kroemer, "Two integral relations pertaining to the electron transport through a bipolar transistor with a nonuniform energy gap in the base region," Solid-State Electron., vol. 28, no. 11, pp. 1101-1103, Nov. 1985.
25. T. Ishibashi, "Influence of electron velocity overshoot on collector transit times of HBTs," IEEE Trans. Electron Devices, vol. 37, pp. 2103-2105, Sept. 1990.
26. U. Konig, A. Gruhle, and A. Schuppen, "SiGe devices and circuits: Where are the advantages over III-V?," in Proc. 1995 IEEE GaAs IC Symp., pp. 14-18.
27. B. Razavi, Y. Ran-Hong, and K. Lee, "Impact of distributed gate resistance on the performance of MOS devices," IEEE Trans. Circuits Syst. I, vol. 41, pp. 750-754, Nov. 1994.
28. L. Kim and R. Dutton, "Modeling the distributed gate RC effect in MOSFETs," IEEE Trans. Computer-Aided Design, vol. 8, pp. 1365-1367, Dec. 1989.
29. A. Schmitz, R. Walden, L. Larson, S. Rosenbaum, R. Metzger, J. Behnke, and P. Macdonald, "A deep-submicrometer microwave/digital CMOS/SOS technology," IEEE Electron Device Lett., vol. 12, pp. 16-17, Jan. 1991.
30. Y. Tsividis, Operation and Modeling of the MOS Transistor, 2nd ed. New York: WCB McGraw-Hill, 1999.
31. H. Iwai, S. Ohmi, H. Sasaki Momose, T. Ohguro, and Y. Katsumata, "Current status and future trend of microwave Si IC technologies," Trans. IEICE C, vol. J83-C, no. 10, pp. 911-919, Oct. 2000.
32. A. Huang and B. Zhang, "The future of bipolar power transistors," IEEE Trans. Electron Devices, vol. 48, pp. 2535-2543, Nov. 2001.
33. E. O. Johnson, "Physical limitation on frequency and power parameters of transistors," in IEEE Int. Conv. Record, 1965, p. 27.
34. D. Harame, "Si/SiGe epitaxial-base transistors-Part I: Materials, physics, and circuits," IEEE Trans. Electron Devices, vol. 42, pp. 455-468, Mar. 1995.
35. R. Jose, "Future developments and technology options in cellular phone power amplifiers: From power amplifier to integrated RF front-end module," in Proc. 2000 Bipolar/BiCMOS Circuits and Technology Meeting, Minneapolis, MN, pp. 118-125.
36. A. Inoue, S. Nakatsuka, R. Hattori, and Y. Matsuda, "The maximum operating region in SiGe HBT's for RF power amplifiers," in Proc. 2002 IEEE MTT-S Int. Microwave Symp., Seattle, WA, June 2002, pp. 1023-1026.
37. H. Wong, "Drain breakdown in submicron MOSFETs: A review," Microelectron. Reliabil., vol. 40, no. 1, pp. 3-15, Jan. 2000.
38. A. Acovic, G. La Rosa, and Y. Sun, "A review of hot-carrier degradation mechanisms in MOSFETs," Microelectron. Reliabil., vol. 36, no. 7-8, pp. 845-869, July-Aug. 1996.
39. T. Sowlati and D. Leenaerts, "A 2.4 GHz 0.18μm CMOS self-biased cascode power amplifier with 23 dBm output power," in Proc. IEEE ISSCC 2002, pp. 108-109.
40. M. van der Heijden, H. de Graaff, L. de Vreede, J. Gajadharsing, and J. Burghartz, "Theory and design of an ultra-linear square-law approximated LDMOS power amplifier in class-AB operation," IEEE Trans. Microwave Theory Tech., vol. 50, pp. 2176-2184, Sept. 2002.
41. G. Temes and J. LaPatra, Introduction to Circuit Synthesis and Design. New York: McGraw-Hill, 1977.
42. L. Larson, "Integrated circuit technology options for RFIC's-Present status and future directions," IEEE J. Solid-State Circuits, vol. 33, pp. 387-399, Mar. 1998.
43. J. Burghartz, D. Edelstein, M. Soyuer, H. Ainspan, and K. Jenkins, "RF circuit design aspects of spiral inductors on silicon," in IEEE J. Solid-State Circuits: IEEE. Dec. 1998, vol. 33, pp. 2028-2034.
44. J. Burghartz, "Spiral inductors on silicon-status and trends," Int. J. RF Microwave Computer-Aided Eng., vol. 8, no. 6, pp. 422-432, Nov. 1998.
45. ____, "Status and trends of silicon RF technology," Microelectron. Reliabil., vol. 41, no. 1, pp. 13-19, Jan. 2001.
46. F. Rotella and J. Zachan, "Modeling and optimization of inductors with patterned ground shields for a high performance fully integrated switched tuning VCO," in Proc. IEEE 2002 Custom Integrated Circuits Conf., May 2002, pp. 221-224.
47. D. Y. C. Lie, X. Yuan, L. E. Larson, T. Robinson, A. Senior, X. Wang, J. Mecke, and M. Case, "Phase noise analysis of fully-integrated digitally-tuned wideband Si/SiGe BiCMOS VCOs," in Proc. 2002 IEEE Bipolar Circuits and Technology Meeting, pp. 128-131.
48. J. Chang, A. Abidi, and M. Gaitan, "Large suspended inductors on silicon and their use in a 2 μm CMOS RF amplifier," IEEE Electron Device Lett., vol. 14, pp. 246-248, May 1993.
49. D. Laney, L. Larson, P. Chan, J. Mallinowski, D. Harame, S. Subbanna, R. Volant, and M. Case, "Microwave transformers, inductors and transmission lines implemented in an Si/SiGe HBT process," IEEE Trans. Microwave Theory Tech., vol. 49, pp. 1507-1510, Sept. 2000.
50. J. Burghartz, M. Soyuer, K. Jenkins, M. Kies, M. Dolan, K. Stein, J. Malinowski, and D. Harame, "Integrated RF components in a SiGe bipolar technology," IEEE J. Solid-State Circuits, vol. 32, pp. 1440-1445, Sept. 1997.
51. D. Coolbaugh, E. Eshun, R. Groves, D. Hararnel, J. Johnson, A. Harnmad, Z. He, V. Ramachandran, K. Stein, S. St. Ongel, S. Subbanna, D. Wang, R. Volant, X. Wang, and K. Watson, "Advanced passive devices for enhanced integrated RF circuit performance," in Tech. Dig. 2002 IEEE MTT-S Int. Microwave Symp., Seattle, WA, June 2002, pp. 187-191.
52. H. Samavati, A. Hajimiri, A. Shahani, G. Nasserbakht, and T. Lee, "Fractal capacitors," IEEE J. Solid-State Circuits, vol. 33, pp. 2035-2041, Dec. 1998.
53. R. Aparicio and A. Hajimiri, "Capacity limits and matching properties of lateral flux integrated capacitors," in Proc. 2001 Custom Integrated Circuits Conf., San Diego, CA, May 2001, pp. 365-368.
54. T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, U.K.: Cambridge Univ. Press, 1998.
55. A. van der Ziel, Noise in Solid State Devices and Circuits. New York: Wiley, 1986.
56. D. Pehlke, M. Schroter, A. Burstein, M. Matloubian, and M. Chang, "High-frequency application of MOS compact models and their development for scalable RF model libraries," in Proc. IEEE 1998 Custom Integrated Circuits Conf., May 1998, pp. 219-222.
57. J. Deen, C. Chen, and Y. Cheng, "MOSFET modeling for low-noise RF circuit design," in Proc. IEEE 2002 Custom Integrated Circuits Conf., May 2002, pp. 201-205.
58. D. K. Schaeffer and T. Lee, "A 1.5 V 1.5 GHz CMOS low-noise amplifier," IEEE J. Solid-State Circuits, vol. 32, pp. 745-759, May 1997.
59. R. Kraus and G. Knoblinger, "Modeling the gate-related high-frequency and noise characteristics of deep submicron MOSFETs," in Proc. IEEE 2002 Custom Integrated Circuits Conf., May 2002, pp. 209-212.
60. G. Niu, J. Cressler, Z. Shiming, W. Ansley, C. Webster, and D. Harame, "A unified approach to RF and microwave noise parameter modeling in bipolar transistors," IEEE Trans. Electron Devices, vol. 48, pp. 2568-2574, Nov. 2001.
61. J. Cressler, "SiGe HBT technology: A new contender for Si-based RF and microwave circuit applications," IEEE Trans. Microwave Theory Tech., pt. 2, vol. 46, pp. 572-589, May 1998.
62. S. Voinigescu, S. Tarasewicz, T. MacElwee, and J. Ilowski, "An assessment of the state-of-the-art 0.5 μm bulk CMOS technology for RF applications," in IEDM Tech. Dig., 1995, pp. 721-724.
63. X. Li, T. Brogan, M. Esposito, B. Meyers, and K. O, "A comparison of CMOS and SiGe LNA's and mixers for wireless LAN application," in Proc. IEEE 2001 Custom Integrated Circuits Conf., May 2001, pp. 531-534.
64. S. Maas, Nonlinear Microwave Circuits. New York: IEEE Press, 1997.
65. F. Klaassen and W. De Groot, "Modeling of scaled-down MOS transistors," Solid-State Electron., vol. 23, no. 3, pp. 237-242, Mar. 1980.
66. F. Klaassen, "A MOS model for computer-aided design,", Phillips Res. Rep., 31, 1976.
67. P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated Circuits. Boston, MA: Kluwer Academic, 1998.
68. R. Carson, Radio Communications Concepts: Analog. New York: Wiley Interscience, 1994.
69. M. Vaidyanthan, L. Larson, M. Iwamoto, P. Asbeck, and P. Gudem, "A basic theory of high frequency distortion in bipolar transistors," IEEE Trans. Microwave Theory Tech., vol. 51, pp. 448-461, Feb. 2003, to be published.
70. L. C. N. de Vreede, H. C. de Graaft, J. A. Willenmen, W. van Noort, H. F. F. Jos, L. E. Larson, J. W. Slotboom, and J. L. Tauritz, "Bipolar transistor epilayer design using the MAIDS mixed level simulator," IEEE J. Solid-State Circuits, vol. 34, pp. 1331-1338, Sept. 1999.
71. G. Niu, Q. Liang, J. Cressler, C. Webster, and D. Harame, "RF linearity characteristics of SiGe HBT's," IEEE Trans. Microwave Theory Tech., vol. 49, pp. 1558-1565, Sept. 2001.
72. K. L. Fong, "High-frequency analysis of linearity improvement technique of common-emitter transconductance stages using a low-frequency-trap network," IEEE J. Solid-State Circuits, vol. 35, pp. 1249-1271, Aug. 2000.
73. J. Vuolevi and T. Rahkonen, "The effects of source impedance on the linearity of BJT common-emitter amplifiers," in Proc. ISCAS 2000, vol. VI, May 2000, pp. 197-200.
74. V. Aparin and C. Persico, "Effect of out-of-band terminations on intermodulation distortion in common-emitter circuits," in IEEE MTT-S Dig., vol. 3, June 1999, pp. 977-980.
75. D. Leeson, "Simple model of a feedback oscillator noise spectrum," Proc. IEEE, vol. 54, Feb. 1956.
76. G. Niu et al., "Transistor Noise in SiGe HBT RF Technology," in IEEE 2000 BCTM, 2000, pp. 207-210.
77. S. Vora and L. Larson, "Noise power optimization of monolithic CMOS VCOS," in 1999 Radio Frequency Integrated Circuit Symp. Dig., vol. 2, pp. 163-166.
78. A. Hajimiri and T. H. Lee, "Design issues in CMOS differential LC oscillators," IEEE J. Solid-State Circuits, vol. 34, pp. 717-724, May 1999.
79. T. Johansen and L. Larson, "Optimization of SiGe VCO's for wireless applications," in Proc. 2002 Asia-Pacific Microwave Conf., Kyoto, Japan.
80. C. Samori, A. L. Lacaita, F. Villa, and F. Zappa, "Spectrum folding and phase noise in LC tuned oscillators," IEEE Trans. Circuits Syst. II, vol. 45, pp. 781-790, July 1998.
81. E. Hegazi, H. Sjoland, and A. Abidi, "A filtering technique to lower LC oscillator phase noise," IEEE J. Solid-State Circuits, vol. 36, pp. 1921-1930, Dec. 2001.
82. B. Buck, M. Green, A. Dearn, A. Long, S. Melvin, and J. Clifton, "GaAs MMIC's for 5.2 GHz HIPERLAN," in Proc. 5th Annu. Wireless Symp., Feb. 1997, pp. 62-66.
83. B. Jansen, K. Negus, and D. Lee, "Silicon bipolar VCO family for 1.1 to 2.2 GHz with fully integrated tank and tuning circuits," in IEEE ISSCC Dig. Tech. Papers, Feb. 1997, pp. 392-393.
84. P. Baltus, A. Wagermans, R. Dekker, A. Hoogstrade, H. Maas, A. Tombeur, and J. Sinderen, "A 3.5 mW 2.5 GHz diversity receiver and a 1.2 mW 3.6 GHz VCO in silicon-on-anything," IEEE J. Solid-State Circuits, vol. 33, pp. 2074-2080, Dec. 1998.
85. P. Kinget, "A fully integrated 2.7 V 0.35 μm CMOS VCO for 5 GHz wireless applications," in IEEE ISSCC Dig. Tech. Papers, Feb. 1999, pp. 226-227.
86. J. Plouchart, "Design of HBT MMIC's for PLL applications," Ph.D. dissertation, Univ. of Paris, France, May 1994.
87. H. Wong, "A 9.8 GHz back-gate tuned VCO in 0.35 μm CMOS," in IEEE ISSCC Dig. Tech. Papers, Feb. 1999, pp. 406-407.
88. J. Plouchart, B. Klesper, H. Ainspan, and M. Soyeur, "Fully monolithic 3-V SiGe differential voltage-controlled oscillators for 5 GHz and 17 GHz wireless applications," in Proc. Eur. Solid-State Circuits Conf., Sept. 1998, pp. 332-335.
89. F. Herzel, M. Pierschel, P. Weger, and M. Tiebout, "Phase noise in a differential CMOS voltage-controlled oscillator in RF applications," IEEE Trans. Circuits Syst. II, vol. 47, pp. 11-15, Jan. 2000.
90. C. Samori, A. Zanchi, S. Levantino, and A. Lacaita, "A fully integrated low-power low-noise 2.6 GHz bipolar VCO for wireless applications," IEEE Microwave Wireless Components Lett., vol. 11, pp. 199-201, May 2001.
91. J. Plouchart, H. Ainspan, M. Soyeur, and A. Ruehli, "A fully monolithic SiGe differential voltage-controlled oscillators for 5 GHz wireless applications," in Proc. 2000 IEEE Radio Frequency Integrated Circuits Symp., June 2000, pp. 57-59.