Mitigating the impact of variability on chip-multiprocessor power and performance

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 17, Issue 10, 2009, Pages 1520-1533

  Herbert, Sebastian ^a   Marculescu, Diana ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Computer architecture; Computer performance

Indexed keywords

CHIP MULTIPROCESSOR; CLOCK FREQUENCY; COMPUTER PERFORMANCE; INTEGRATED APPROACH; LEVEL MODEL; ON CHIPS; PERFORMANCE VARIATIONS; TECHNOLOGY SCALING; THERMAL VARIATION; WITHIN-DIE PROCESS;

ADAPTIVE SYSTEMS; BUILDING MATERIALS; COMPUTERS; DIES; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS;

COMPUTER ARCHITECTURE;

EID: 70349755390     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2009.2020394     Document Type: Article

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