A 250 mV 8 kb 40 nm ultra-low power 9t supply feedback SRAM (SF-SRAM)

IEEE Journal of Solid-State Circuits

Volumn 46, Issue 11, 2011, Pages 2713-2726

  Teman, Adam ^a   Pergament, Lidor ^a   Cohen, Omer ^a   Fish, Alexander ^a  

^a BEN GURION UNIVERSITY OF THE NEGEV   (Israel)

Author keywords

CMOS memory integrated circuits; leakage suppression; SRAM; ultra low power

Indexed keywords

BITCELL; CMOS MEMORY INTEGRATED CIRCUITS; LEAKAGE SUPPRESSION; LOCAL VARIATIONS; LOW POWER; LOW VOLTAGE OPERATION; LOW-VOLTAGE; PERIPHERAL CIRCUITS; POWER REDUCTIONS; PROCESS VARIATION; REDUCING POWER; ULTRA LOW POWER; WRITE OPERATIONS;

CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; STANDARDIZATION;

STATIC RANDOM ACCESS STORAGE;

EID: 80255136207     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2011.2164009     Document Type: Conference Paper

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