Wafer-testing of optoelectonic - Gigascale CMOS integrated circuits

IEEE Journal on Selected Topics in Quantum Electronics

Volumn 17, Issue 3, 2011, Pages 659-670

  Thacker, Hiren D ^a   Ogunsola, Oluwafemi O ^b   Muler, Anthony V ^c   Meindl, James D ^d  

^a ORACLE CORPORATION   (United States)

^b IBM   (United States)

^c INTEL CORPORATION   (United States)

^d GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

CMOS photonic testing; compliant probe; microelectromechanical systems (MEMS) probe; optical I O; optoelectronic (OE) testing; through silicon via (TSV)

Indexed keywords

CMOS PHOTONIC TESTING; COMPLIANT PROBE; MICROELECTROMECHANICAL SYSTEMS (MEMS) PROBE; OPTICAL I/O; OPTOELECTRONIC (OE) TESTING; THROUGH-SILICON VIA (TSV);

COMPOSITE MICROMECHANICS; INTEGRATION; MECHATRONICS; MEMS; MICROELECTROMECHANICAL DEVICES; PROBES; SILICON WAFERS; SUBSTRATES;

CMOS INTEGRATED CIRCUITS;

EID: 79958269401     PISSN: 1077260X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSTQE.2010.2089431     Document Type: Article

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