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Volumn , Issue , 2003, Pages

Sea of dual mode polymer pillar I/O interconnects for gigascale integration

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; INTEGRATED CIRCUIT MANUFACTURE; LIGHT; MIRRORS; OPTICAL INTERCONNECTS; OPTICAL WAVEGUIDES; ORGANIC POLYMERS; REFRACTIVE INDEX; SOLDERING ALLOYS; SUBSTRATES;

EID: 0037630721     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (6)
  • 1
    • 0035058589 scopus 로고    scopus 로고
    • Sea of leads: A disruptive paradigm for a system-on-a-chip
    • A. Naeemi, et al., "Sea of leads: A disruptive paradigm for a system-on-a-chip," ISSCC Dig. Tech. Papers, pp. 280-281, 2001.
    • (2001) ISSCC Dig. Tech. Papers , pp. 280-281
    • Naeemi, A.1
  • 2
    • 0036297031 scopus 로고    scopus 로고
    • Sea of leads ultra-high density compliant wafer-level packaging technology
    • M. S. Bakir, et al., "Sea of leads ultra-high density compliant wafer-level packaging technology," IEEE Electronic Components and Tech. Conf., pp. 1087-1094, 2002.
    • (2002) IEEE Electronic Components and Tech. Conf. , pp. 1087-1094
    • Bakir, M.S.1
  • 3
    • 3142547915 scopus 로고    scopus 로고
    • RF/wireless interconnect for inter- and intra-chip communications
    • Apr.
    • M. F. Chang, et al., "RF/wireless interconnect for inter- and intra-chip communications," Proc. of the IEEE, pp. 456-466, Apr. 2002.
    • (2002) Proc. of the IEEE , pp. 456-466
    • Chang, M.F.1
  • 4
    • 0038563774 scopus 로고    scopus 로고
    • 2001 International Technology Roadmap for Semiconductors (ITRS), SIA
    • 2001 International Technology Roadmap for Semiconductors (ITRS), SIA.
  • 5
    • 0033719714 scopus 로고    scopus 로고
    • An integrated architecture for global interconnects in a gigascale system-on-a-chip (GSoC)
    • P. Zarkesh-Ha, et al., "An Integrated Architecture for Global Interconnects in a Gigascale System-on-a-Chip (GSoC)," IEEE Symp. on VLSI Tech., pp. 194-195, 2000.
    • (2000) IEEE Symp. on VLSI Tech. , pp. 194-195
    • Zarkesh-Ha, P.1
  • 6
    • 0242443414 scopus 로고    scopus 로고
    • The evolution of monolithic and polylithic interconnect technology
    • J. D. Meindl, "The evolution of monolithic and polylithic interconnect technology," IEEE VLSI Circuits Symp., pp.2-5, 2002.
    • (2002) IEEE VLSI Circuits Symp. , pp. 2-5
    • Meindl, J.D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.