Challenges and Design Choices in Nanoscale CMOS

ACM Journal on Emerging Technologies in Computing Systems

Volumn 1, Issue 1, 2005, Pages 7-49

  Narendra, Siva G ^a  

^a NONE   (United States)

Author keywords

CMOS; Design; leakage power; nanoscale; process variation

Indexed keywords

EID: 76849097119     PISSN: 15504832     EISSN: 15504840     Source Type: Journal    
DOI: 10.1145/1063803.1063805     Document Type: Article

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