1 V DSP for wireless communications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 40, Issue , 1997, Pages 92-93

  Lee, Wai ^a   Landman, Paul ^a   Barton, Brock ^a   Abiko, Shigeshi ^a   Takahashi, Hiroshi ^a   Mizuno, Hiroyuki ^a   Muramatsu, Shigetoshi ^a   Tashiro, Kenichi ^a   Fusumada, Yasahiro ^a   Pham, Luat ^a   Boutaud, Frederic ^a   Ego, Emmanuel ^a   Gallo, Girolamo ^a   Tran, Hiep ^a   Lemonds, Carl ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; FREQUENCY DIVIDING CIRCUITS; LOGIC CIRCUITS; PARALLEL PROCESSING SYSTEMS; PHASE LOCKED LOOPS; RADIO COMMUNICATION; RANDOM ACCESS STORAGE; ROM; SOLID STATE OSCILLATORS; TRANSISTORS; VOLTAGE CONTROL;

ARITHMETIC LOGIC UNITS (ALU); CENTRAL PROCESSING UNITS (CPU); CLOCK GENERATION; EMBEDDED DIGITAL SIGNAL PROCESSING CIRCUITS;

DIGITAL SIGNAL PROCESSING;

EID: 0031069084     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)