A 450MHz 64b RISC processor using multiple threshold voltage CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 414-415

  Yamashita, T ^a   Yoshida, N ^a   Sakamoto, M ^a   Matsumoto, T ^a   Kusunoki, M ^a   Takahashi, H ^a   Wakahara, A ^a   Ito, T ^a   Shimizu, T ^a   Kurita, K ^a   Higeta, K ^a   Mori, K ^a   Tamba, N ^a   Kato, N ^a   Miyamoto, K ^a   Yamagata, R ^a   Tanaka, H ^a   Hiyama, T ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CMOS INTEGRATED CIRCUITS; CRITICAL PATH ANALYSIS; DELAY CIRCUITS; DYNAMIC RANDOM ACCESS STORAGE; LOGIC GATES; MICROPROCESSOR CHIPS; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; STATIC RANDOM ACCESS STORAGE; THRESHOLD VOLTAGE; TRANSISTORS;

CURRENT-CONTROLLED OSCILLATORS (CCO);

REDUCED INSTRUCTION SET COMPUTING;

EID: 0034430274     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. A 480MHz RISC microprocessor in a 0.12μm Leff CMOS technology with copper interconnects
2. A RISC processor for SR8000: Accelerating large scale scientific computing with SMP
3. A fault-detecting 400MHz floating-point unit for a massively parallel computer
4. A 0.9ns access, 700MHz SRAM macro using a configurable organization technique with an automatic timing adjuster