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Volumn 56, Issue 7, 2009, Pages 1458-1465

Platinum germanosilicide as source/drain contacts in P-channel fin field-effect transistors (FinFETs)

Author keywords

External resistance; FinFET; Platinum germanosilicide; Schottky barrier

Indexed keywords

CONTACT FORMATION; DRIVE CURRENTS; EXTERNAL RESISTANCE; FIN FIELD-EFFECT TRANSISTORS; FINFET; FINFET DEVICES; FINFETS; GERMANOSILICIDE; HOLE BARRIER; MORPHOLOGICAL STABILITY; NICKEL GERMANOSILICIDE; SCHOTTKY BARRIER; SCHOTTKY BARRIER HEIGHTS; SELF ALIGNED PROCESS; SHORT-CHANNEL EFFECT; SILICON GERMANIUM; STATISTICAL COMPARISONS; STRAINED TRANSISTOR; TRANSISTOR PERFORMANCE;

EID: 67650098163     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2021351     Document Type: Article
Times cited : (6)

References (38)
  • 3
    • 50249185641 scopus 로고    scopus 로고
    • K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C. H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hatttendorf, J. He, J. Hicks, R. Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pei, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Schifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. Troeger, P. Vandervoorn, S. Williams, and K. Zawadzki, A 45 nm logic technology with high-k plus metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging, in IEDM Tech. Dig, 2007, pp. 247-250
    • K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C. H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hatttendorf, J. He, J. Hicks, R. Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pei, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Schifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. Troeger, P. Vandervoorn, S. Williams, and K. Zawadzki, "A 45 nm logic technology with high-k plus metal gate transistors, strained silicon, 9 Cu interconnect layers, 193 nm dry patterning, and 100% Pb-free packaging," in IEDM Tech. Dig., 2007, pp. 247-250.
  • 5
    • 27744475710 scopus 로고    scopus 로고
    • D. Zhang, B. Y. Nguyen, T. White, B. Goolsby, T. Nguyen, V. Dhandapani, J. Hildreth, M. Foisy, V. Adams, Y. Shiho, A. Thean, D. Theodore, M. Canonico, S. Zollner, S. Bagchi, S. Murphy, R. Rai, J. Jiang, M. Jahanbani, R. Noble, M. Zavala, R. Cotton, D. Eades, S. Parsons, P. Montgomery, A. Martinez, B. Winstead, M. Mendicino, J. Cheek, J. Liu, P. Grudowski, N. Ranami, P. Tomasini, C. Arena, C. Werkhoven, H. Kirby, C. H. Chang, C. T. Lin, H. C. Tuan, Y. C. See, S. Venkatesan, V. Kolagunta, N. Cave, and J. Mogab, Embedded SiGe S/D PMOS on thin body SOI substrate with drive current enhancement, in Symp. VLSI Technol. 2005, pp. 26-27.
    • D. Zhang, B. Y. Nguyen, T. White, B. Goolsby, T. Nguyen, V. Dhandapani, J. Hildreth, M. Foisy, V. Adams, Y. Shiho, A. Thean, D. Theodore, M. Canonico, S. Zollner, S. Bagchi, S. Murphy, R. Rai, J. Jiang, M. Jahanbani, R. Noble, M. Zavala, R. Cotton, D. Eades, S. Parsons, P. Montgomery, A. Martinez, B. Winstead, M. Mendicino, J. Cheek, J. Liu, P. Grudowski, N. Ranami, P. Tomasini, C. Arena, C. Werkhoven, H. Kirby, C. H. Chang, C. T. Lin, H. C. Tuan, Y. C. See, S. Venkatesan, V. Kolagunta, N. Cave, and J. Mogab, "Embedded SiGe S/D PMOS on thin body SOI substrate with drive current enhancement," in Symp. VLSI Technol. 2005, pp. 26-27.
  • 9
    • 19744383008 scopus 로고    scopus 로고
    • Finite element study of strain distribution in transistor with silicon-germanium source and drain regions
    • Jan
    • Y.-C. Yeo and J. Sun, "Finite element study of strain distribution in transistor with silicon-germanium source and drain regions," Appl. Phys. Lett., vol. 86, no. 2, p. 023 103, Jan. 2005.
    • (2005) Appl. Phys. Lett , vol.86 , Issue.2 , pp. 023-103
    • Yeo, Y.-C.1    Sun, J.2
  • 11
    • 23944435747 scopus 로고    scopus 로고
    • x source/drain junctions for nanoscale CMOS
    • Jul
    • x source/drain junctions for nanoscale CMOS," IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1535-1540, Jul. 2005.
    • (2005) IEEE Trans. Electron Devices , vol.52 , Issue.7 , pp. 1535-1540
    • Liu, J.1    Ozturk, M.C.2
  • 12
  • 17
    • 0036494258 scopus 로고    scopus 로고
    • Advanced model and analysis of series resistance for CMOS scaling into nanometer regime. II. Quantitative analysis
    • Mar
    • S.D. Kim, C. M. Park, and J. C. S. Woo, "Advanced model and analysis of series resistance for CMOS scaling into nanometer regime. II. Quantitative analysis," IEEE Trans. Electron Devices, vol. 49, no. 3, pp. 467-472, Mar. 2002.
    • (2002) IEEE Trans. Electron Devices , vol.49 , Issue.3 , pp. 467-472
    • Kim, S.D.1    Park, C.M.2    Woo, J.C.S.3
  • 18
    • 0020114945 scopus 로고
    • A transmission line model for silicided diffusions: Impact on the performance of VLSI circuits
    • Apr
    • D. B. Scott, W. R. Hunter, and H. Schichijo, "A transmission line model for silicided diffusions: Impact on the performance of VLSI circuits," IEEE Trans. Electron Devices, vol. ED-29, no. 4, pp. 651-661, Apr. 1982.
    • (1982) IEEE Trans. Electron Devices , vol.ED-29 , Issue.4 , pp. 651-661
    • Scott, D.B.1    Hunter, W.R.2    Schichijo, H.3
  • 19
    • 0032476306 scopus 로고    scopus 로고
    • Low parasitic resistance contacts for scaled ULSI devices
    • Nov
    • C. M. Osburn and K. R. Bellur, "Low parasitic resistance contacts for scaled ULSI devices," Thin Solid Films, vol. 332, no. 1/2, pp. 428-436, Nov. 1998.
    • (1998) Thin Solid Films , vol.332 , Issue.1-2 , pp. 428-436
    • Osburn, C.M.1    Bellur, K.R.2
  • 20
    • 4544244783 scopus 로고    scopus 로고
    • Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique
    • A. Kinoshita, Y. Tsuchiya, A. Yagishita, K. Uchida, and J. Koga, "Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique," in Symp. VLSI Technol., 2004, pp. 168-169.
    • (2004) Symp. VLSI Technol , pp. 168-169
    • Kinoshita, A.1    Tsuchiya, Y.2    Yagishita, A.3    Uchida, K.4    Koga, J.5
  • 22
    • 36549079544 scopus 로고    scopus 로고
    • Effective Schottky barrier height reduction using sulfur or selenium at the NiSi/n-Si(100) interface for low resistance contacts
    • Dec
    • H. S. Wong, L. Chan, G. Samudra, and Y. C. Yeo, "Effective Schottky barrier height reduction using sulfur or selenium at the NiSi/n-Si(100) interface for low resistance contacts," IEEE Electron Device Lett. vol. 28, no. 12, pp. 1102-1104, Dec. 2007.
    • (2007) IEEE Electron Device Lett , vol.28 , Issue.12 , pp. 1102-1104
    • Wong, H.S.1    Chan, L.2    Samudra, G.3    Yeo, Y.C.4
  • 24
    • 47249138570 scopus 로고    scopus 로고
    • Interfacial segregation of metal at NiSi/Si junction for novel dual silicide technology
    • Y. Nishi, Y. Tsuchiya, A. Kinoshita, T. Yamauchi, and J. Koga, "Interfacial segregation of metal at NiSi/Si junction for novel dual silicide technology," in IEDM Tech. Dig., 2007, pp. 135-138.
    • (2007) IEDM Tech. Dig , pp. 135-138
    • Nishi, Y.1    Tsuchiya, Y.2    Kinoshita, A.3    Yamauchi, T.4    Koga, J.5
  • 25
    • 43549115648 scopus 로고    scopus 로고
    • S. Zollner, P. Grudowski, A. Thean, D. Jawarani, G. Karve, T. White, S. Bolton, H. Desjardins, M. Chowdhury, K. Chang, M. Jahanbani, R. Noble, L. Lovejoy, M. Rossow, D. Denning, D. Goedeke, S. Filipiak, R. Garcia, M. Raymond, V. Dhandapani, D. Zhang, L. Kang, P. Crabtree, X. Zhu, M. L. Kottke, R. Gregory, P. Fejes, X. D. Wang, D. Theodore, W. J. Taylor, and B. Y. Nguyen, Dual silicide SOI CMOS integration with low-resistance PtSi PMOS contacts, in Proc. Int. SOI Conf., 2007, pp. 65-66.
    • S. Zollner, P. Grudowski, A. Thean, D. Jawarani, G. Karve, T. White, S. Bolton, H. Desjardins, M. Chowdhury, K. Chang, M. Jahanbani, R. Noble, L. Lovejoy, M. Rossow, D. Denning, D. Goedeke, S. Filipiak, R. Garcia, M. Raymond, V. Dhandapani, D. Zhang, L. Kang, P. Crabtree, X. Zhu, M. L. Kottke, R. Gregory, P. Fejes, X. D. Wang, D. Theodore, W. J. Taylor, and B. Y. Nguyen, "Dual silicide SOI CMOS integration with low-resistance PtSi PMOS contacts," in Proc. Int. SOI Conf., 2007, pp. 65-66.
  • 27
    • 37749045251 scopus 로고    scopus 로고
    • A comparative study of two different schemes to dopant segregation at NiSi/Si and PtSi/Si interfaces for Schottky barrier height lowering
    • Jan
    • Z. J. Qiu, Z. Zhang, M. Ostling, and S. L. Zhang, "A comparative study of two different schemes to dopant segregation at NiSi/Si and PtSi/Si interfaces for Schottky barrier height lowering," IEEE Trans. Electron Device, vol. 55, no. 1, pp. 396-403, Jan. 2008.
    • (2008) IEEE Trans. Electron Device , vol.55 , Issue.1 , pp. 396-403
    • Qiu, Z.J.1    Zhang, Z.2    Ostling, M.3    Zhang, S.L.4
  • 28
    • 34548815383 scopus 로고    scopus 로고
    • Thermal stability of NiPt- and Pt-silicide contacts on SiGe source/drain
    • Nov
    • C. Demeurisse, P. Verheyen, K. Opsomer, C. Vrancken, P. Absil, and A. Lauwers, "Thermal stability of NiPt- and Pt-silicide contacts on SiGe source/drain," Microelectron. Eng., vol. 84, no. 11, pp. 2547-2551, Nov. 2007.
    • (2007) Microelectron. Eng , vol.84 , Issue.11 , pp. 2547-2551
    • Demeurisse, C.1    Verheyen, P.2    Opsomer, K.3    Vrancken, C.4    Absil, P.5    Lauwers, A.6
  • 32
    • 0142011598 scopus 로고    scopus 로고
    • Nickel-based contact metallization for SiGe MOSFETs: Progress and challenges
    • Nov
    • S. L. Zhang, "Nickel-based contact metallization for SiGe MOSFETs: Progress and challenges," Microelectron. Eng., vol. 70, no. 2-4, pp. 174-185, Nov. 2003.
    • (2003) Microelectron. Eng , vol.70 , Issue.2-4 , pp. 174-185
    • Zhang, S.L.1
  • 33
    • 0030401968 scopus 로고    scopus 로고
    • prediction of silicide formation and stability using heats of formation
    • Dec
    • R. Pretorius, "prediction of silicide formation and stability using heats of formation," Thin Solid Films, vol. 290/291, pp. 477-484, Dec. 1996.
    • (1996) Thin Solid Films , vol.290-291 , pp. 477-484
    • Pretorius, R.1
  • 35
    • 33847250983 scopus 로고    scopus 로고
    • Grain-boundary grooving and agglomeration of alloy thin films with a slow-diffusing species
    • Feb
    • M. Bouville, D. Z. Chi, and D. J. Srolovitz, "Grain-boundary grooving and agglomeration of alloy thin films with a slow-diffusing species," Phys. Rev. Lett., vol. 98, no. 8, p. 085 503, Feb. 2007.
    • (2007) Phys. Rev. Lett , vol.98 , Issue.8 , pp. 085-503
    • Bouville, M.1    Chi, D.Z.2    Srolovitz, D.J.3
  • 36
    • 0742286720 scopus 로고    scopus 로고
    • Etch rates for micromachining processing: Part II
    • Dec
    • K. R. William, K. Gupta, and M. Wasilik, "Etch rates for micromachining processing: Part II," J. Microelectromech. Syst., vol. 12, no. 6, pp. 761-778, Dec. 2003.
    • (2003) J. Microelectromech. Syst , vol.12 , Issue.6 , pp. 761-778
    • William, K.R.1    Gupta, K.2    Wasilik, M.3
  • 37
    • 0009073302 scopus 로고
    • Observations on the formation and etching of platinum silicide
    • Feb
    • M. J. Rand and J. F. Roberts, "Observations on the formation and etching of platinum silicide," Appl. Phys. Lett., vol. 24, no. 2, pp. 49-51, Feb. 1974.
    • (1974) Appl. Phys. Lett , vol.24 , Issue.2 , pp. 49-51
    • Rand, M.J.1    Roberts, J.F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.