Integration of PtSi in p-type MOSFETs using a sacrificial low-temperature germanidation process

IEEE Electron Device Letters

Volumn 29, Issue 2, 2008, Pages 152-154

  Breil, Nicolas ^a,b   Dubois, Emmanuel ^b   Halimaoui, Aomar ^a   Pouydebasque, Arnaud ^c   Laszcz A ^d   Ratajcak, J ^d   Larrieu, Guilhem ^b   Skotnicki, Thomas ^a  

^a STMICROELECTRONICS   (France)

^b INSTITUT D ELECTRONIQUE   (France)

^c CEA GRENOBLE   (France)

^d ukasiewicz Research Network Institute of Microelectronics and Photonics   (Poland)

Author keywords

Etching; Platinum; Schottky barriers; Semiconductor metal interfaces; Silicon

Indexed keywords

ANNEALING; ETCHING; INTERFACES (MATERIALS); PLATINUM COMPOUNDS; SCHOTTKY BARRIER DIODES; SOLUBILITY; SULFUR COMPOUNDS; VALENCE BANDS;

LOW-TEMPERATURE GERMANIDATION PROCESS; SEMICONDUCTOR-METAL INTERFACES; SULFURIC PEROXIDE MIXTURE;

MOSFET DEVICES;

EID: 39549106669     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2007.914090     Document Type: Article

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