Bridging fault diagnostic tool based on ΔiDDQ probabilistic signatures, circuit layout parasitics and logic errors

IET Computers and Digital Techniques

Volumn 1, Issue 6, 2007, Pages 694-705

  Hariri, Y ^a   Thibeault, C ^a  

^a ÉCOLE DE TECHNOLOGIE SUPÉRIEURE   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; DATA STRUCTURES; FAILURE ANALYSIS; GATEWAYS (COMPUTER NETWORKS); PROBABILISTIC LOGICS;

DATA SOURCES; DIAGNOSTIC TOOL; PARASITIC CAPACITANCES;

COMPUTER AIDED SOFTWARE ENGINEERING;

EID: 35648984011     PISSN: 17518601     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cdt:20060199     Document Type: Article

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