-
4
-
-
0033307906
-
An histogram based procedure for current testing of active defects
-
C. Thibeault, "An Histogram Based Procedure for Current Testing of Active Defects," Int. Test Conf, pp. 714-723, 1999.
-
(1999)
Int. Test Conf
, pp. 714-723
-
-
Thibeault, C.1
-
5
-
-
0034171710
-
Iddq testing for CMOS VLSI
-
April
-
R. Rajsuman, "Iddq Testing for CMOS VLSI", Proc. of IEEE, vol. 88, no. 4, April 2000, pp. 544-566
-
(2000)
Proc. of IEEE
, vol.88
, Issue.4
, pp. 544-566
-
-
Rajsuman, R.1
-
6
-
-
0031375455
-
Transient power supply voltage analysis for detecting IC defects
-
E.I. Cole Jr. et al., "Transient Power Supply Voltage Analysis for Detecting IC defects," Int. Test Conf., 1997, pp. 23-31.
-
(1997)
Int. Test Conf.
, pp. 23-31
-
-
Cole Jr., E.I.1
-
7
-
-
0033333871
-
Transient current testing of 0.25mm CMOS devices
-
B. Krusemen, P. Janssen and V. Zieren, "Transient Current Testing of 0.25mm CMOS Devices", Int. Test Conf, 1999, pp. 47-56.
-
(1999)
Int. Test Conf
, pp. 47-56
-
-
Krusemen, B.1
Janssen, P.2
Zieren, V.3
-
8
-
-
0030386564
-
Digital integrated circuit testing using transient signal analysis
-
J.F. Plusquellic, D.M. Chiarulli and S.P. Levitan, "Digital Integrated Circuit Testing Using Transient Signal Analysis," Int. Test Conf., 1996, pp. 481-490.
-
(1996)
Int. Test Conf.
, pp. 481-490
-
-
Plusquellic, J.F.1
Chiarulli, D.M.2
Levitan, S.P.3
-
9
-
-
0032320511
-
Process-tolerant test with the energy consumption ratio
-
B. Vinnakota, W. Jiang, D. Sun, "Process-Tolerant Test with the Energy Consumption Ratio," Int. Test Conf., 1998, pp. 1027-1036.
-
(1998)
Int. Test Conf.
, pp. 1027-1036
-
-
Vinnakota, B.1
Jiang, W.2
Sun, D.3
-
12
-
-
0034478410
-
DDQ test resolution using current prediction
-
DDQ Test Resolution Using Current Prediction," Int. Test Conf., 2000, pp. 217-224.
-
(2000)
Int. Test Conf.
, pp. 217-224
-
-
Varyiam, P.N.1
-
17
-
-
0031382110
-
Intrinsic leakage in low power deep submicron CMOS ICs
-
A. Keshvarzi, K. Roy, and C.F. Hawkins, "Intrinsic Leakage in Low Power Deep Submicron CMOS ICs," Int. Test Conf., 1997, pp. 146-155.
-
(1997)
Int. Test Conf.
, pp. 146-155
-
-
Keshvarzi, A.1
Roy, K.2
Hawkins, C.F.3
-
20
-
-
0032314887
-
DDQ probabilistic signatures: Experimental results
-
DDQ Probabilistic Signatures: Experimental Results," Int. Test Conf, pp. 1019-1026, 1998.
-
(1998)
Int. Test Conf
, pp. 1019-1026
-
-
Thibeault, C.1
Boisvert, L.2
-
21
-
-
0002099112
-
DDQ estimation
-
Monterey, CA, April
-
DDQ Estimation," IEEE Int. Workshop on Defect Based Testing, Monterey, CA, April 2002, pp. 47-52.
-
(2002)
IEEE Int. Workshop on Defect Based Testing
, pp. 47-52
-
-
Sabade, S.1
Walker, D.M.H.2
-
22
-
-
21444434711
-
On the potential of flush delay for characterization and test optimization
-
C. Thibeault, "On the Potential of Flush Delay for Characterization and Test Optimization," IEEE Int. Workshop on Defect Based Testing, pp. 53-58, 2004.
-
(2004)
IEEE Int. Workshop on Defect Based Testing
, pp. 53-58
-
-
Thibeault, C.1
-
23
-
-
0142246907
-
Screening VDSM outliers using nominal and subthreshold supply voltage IDDQ
-
C. Schuermyer et al., "Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ," Int. Test Conf., 2003, pp. 565-573.
-
(2003)
Int. Test Conf.
, pp. 565-573
-
-
Schuermyer, C.1
-
25
-
-
3142685465
-
On new current signatures and adaptive test technique combination
-
C. Thibeault, "On New Current Signatures and Adaptive Test Technique Combination," IEEE VLSI Test Symp., pp. 59-64, 2004.
-
(2004)
IEEE VLSI Test Symp.
, pp. 59-64
-
-
Thibeault, C.1
-
26
-
-
0034476391
-
Test method evaluation experiments and data
-
P. Nigh, and A. Gattiker, "Test Method Evaluation Experiments and Data," Int. Test Conf., 2000, pp. 454-463.
-
(2000)
Int. Test Conf.
, pp. 454-463
-
-
Nigh, P.1
Gattiker, A.2
|