Design error diagnosis and correction via test vector simulation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 12, 1999, Pages 1803-1816

  Veneris, Andreas ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DECISION THEORY; DIGITAL INTEGRATED CIRCUITS; ERROR ANALYSIS; ERROR CORRECTION; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; VECTORS; VLSI CIRCUITS;

BINARY DECISION DIAGRAM; TEST VECTOR SIMULATION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033351758     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.811329     Document Type: Article

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