HITEC: A test generation package for sequential circuits

Volumn , Issue , 1992, Pages 214-218

  Niermann, Thomas ^a   Patel, Janak H ^a  

^a Sunrise Test Systems Inc ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT TESTING; STATE ASSIGNMENT;

SEQUENTIAL CIRCUIT TEST GENERATION PACKAGE HITEC; TARGETED D ELEMENT TECHNIQUE;

SEQUENTIAL CIRCUITS;

EID: 0027072656     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)