Logic synthesis for engineering change

Proceedings - Design Automation Conference

Volumn , Issue , 1995, Pages 647-652

  Lin, Chih chang ^a   Chang, Shih Chieh ^a   Chen, Kuang Chien ^a   Marek Sadowska, Malgorzata ^a   Cheng, Kwang Ting ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; ELECTRIC NETWORK SYNTHESIS; EQUIVALENCE CLASSES; ERROR CORRECTION; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES; OPTIMIZATION; VLSI CIRCUITS;

ENGINEERING CHANGE; LOGIC SYNTHESIS; POWER CONSUMPTION;

COMPUTER AIDED LOGIC DESIGN;

EID: 0029235755     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/217474.217604     Document Type: Conference Paper

References (17)