Exploiting emergence in on-chip interconnects

IEEE Transactions on Computers

Volumn 63, Issue 3, 2014, Pages 570-582

  Hollis, Simon J ^a   Jackson, Chris ^a   Bogdan, Paul ^b   Marculescu, Radu ^b  

^a UNIVERSITY OF BRISTOL   (United Kingdom)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

adaptation; Emergence; energy efficiency; networks on chip (NoC); skip links; small world; topologies

Indexed keywords

ENERGY UTILIZATION; OPTIMIZATION; PROGRAMMABLE LOGIC CONTROLLERS; TOPOLOGY;

ADAPTATION; EMERGENCE; NETWORKS ON CHIPS; SKIP LINKS; SMALL WORLDS;

DISTRIBUTED COMPUTER SYSTEMS;

EID: 84897547464     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2012.273     Document Type: Article

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