-
1
-
-
35648995516
-
-
(Tech. Rep. No. UCB/EECS-2006-183). Berkeley, CA: University of California
-
Asanovic, K., Bodik, R., Catanzaro, B. C., Gebis, J. J., Husbands, P., Keutzer, K., et al. (2006). The landscape of parallel computing research: A view from Berkeley (Tech. Rep. No. UCB/EECS-2006-183). Berkeley, CA: University of California.
-
(2006)
The Landscape of Parallel Computing Research: A View from Berkeley
-
-
Asanovic, K.1
Bodik, R.2
Catanzaro, B.C.3
Gebis, J.J.4
Husbands, P.5
Keutzer, K.6
-
2
-
-
36349006382
-
A power and energy exploration of network-on-chip architectures
-
Washington, DC: IEEE Computer Society
-
Banerjee, A., Mullins, R., & Moore, S. (2007, May). A power and energy exploration of network-on-chip architectures. In Proceedings of the First International Symposium on Networks-on-Chip (pp. 163-172). Washington, DC: IEEE Computer Society.
-
(2007)
Proceedings of the First International Symposium on Networks-on-Chip
, pp. 163-172
-
-
Banerjee, A.1
Mullins, R.2
Moore, S.3
-
3
-
-
67650305372
-
Compiler-directed application mapping for Noc based chip multiprocessors
-
doi:10.1145/1273444.1254796
-
Chen, G., Li, F., & Kandemir, M. (2007). Compiler-directed application mapping for Noc based chip multiprocessors. SIGPLAN Notes, 42(7), 155-157. doi:10.1145/1273444.1254796
-
(2007)
SIGPLAN Notes
, vol.42
, Issue.7
, pp. 155-157
-
-
Chen, G.1
Li, F.2
Kandemir, M.3
-
4
-
-
0034848112
-
Route packets, not wires: On-chip interconnection networks
-
New York, NY: ACM Press
-
Dally, W. J., & Towles, B. (2001). Route packets, not wires: On-chip interconnection networks. In Proceedings of the 38th Conference on Design Automation (pp. 684-689). New York, NY: ACM Press.
-
(2001)
Proceedings of the 38th Conference on Design Automation
, pp. 684-689
-
-
Dally, W.J.1
Towles, B.2
-
6
-
-
77949589985
-
When does network-on-chip bypassing make sense?
-
September, Washington, DC: IEEE Computer Society
-
Hollis, S. J., & Jackson, C. (2009, September). When does network-on-chip bypassing make sense? In Proceedings of the 22nd IEEE International SOCC Conference (pp. 143-146). Washington, DC: IEEE Computer Society.
-
(2009)
Proceedings of the 22nd IEEE International SOCC Conference
, pp. 143-146
-
-
Hollis, S.J.1
Jackson, C.2
-
8
-
-
79951869402
-
A deadlock-free routing algorithm for dynamically reconfigurable networks-on-chip
-
doi:10.1016/j.micpro.2010.09.004
-
Jackson, C., & Hollis, S. J. (2011). A deadlock-free routing algorithm for dynamically reconfigurable networks-on-chip. Microprocessors and Microsystems, 35(2), 139-151. doi:10.1016/j.micpro.2010.09.004
-
(2011)
Microprocessors and Microsystems
, vol.35
, Issue.2
, pp. 139-151
-
-
Jackson, C.1
Hollis, S.J.2
-
10
-
-
35348857534
-
Globally asynchronous, locally synchronous circuits: Overview and outlook
-
doi:10.1109/MDT.2007.164
-
Krstic, M., Grass, E., Gurkaynak, F. K., & Vivet, P. (2007). Globally asynchronous, locally synchronous circuits: Overview and outlook. IEEE Design & Test of Computers, 24, 430-441. doi:10.1109/MDT.2007.164
-
(2007)
IEEE Design & Test of Computers
, vol.24
, pp. 430-441
-
-
Krstic, M.1
Grass, E.2
Gurkaynak, F.K.3
Vivet, P.4
-
11
-
-
35348858651
-
Express virtual channels: Towards the ideal interconnection fabric
-
doi:10.1145/1273440.1250681
-
Kumar, A., Peh, L.-S., Kundu, P., & Jha, N. K. (2007). Express virtual channels: Towards the ideal interconnection fabric. SIGARCH Computer Architecture News, 35(2), 150-161. doi:10.1145/1273440.1250681
-
(2007)
SIGARCH Computer Architecture News
, vol.35
, Issue.2
, pp. 150-161
-
-
Kumar, A.1
Peh, L.-S.2
Kundu, P.3
Jha, N.K.4
-
12
-
-
33645011974
-
Low-power network-on-chip for high-performance soc design
-
doi:10.1109/TVLSI.2005.863753
-
Lee, K., Lee, S.-J., & Yoo, H.-J. (2006). Low-power network-on-chip for high-performance soc design. IEEE Transactions on Very Large Scale Integration Systems, 14, 148-160. doi:10.1109/TVLSI.2005.863753
-
(2006)
IEEE Transactions on Very Large Scale Integration Systems
, vol.14
, pp. 148-160
-
-
Lee, K.1
Lee, S.-J.2
Yoo, H.-J.3
-
13
-
-
74049134328
-
Router designs for elastic buffer on-chip networks
-
New York, NY: ACM Press
-
Michelogiannakis, G., & Dally, W. J. (2009). Router designs for elastic buffer on-chip networks. In Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis (pp. 1-10). New York, NY: ACM Press.
-
(2009)
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
, pp. 1-10
-
-
Michelogiannakis, G.1
Dally, W.J.2
-
16
-
-
4444294771
-
Operating-system controlled network on chip
-
New York, NY: ACM Press
-
Nollet, V., Marescaux, T., Verkest, D., Mignolet, J.-Y., & Vernalde, S. (2004). Operating-system controlled network on chip. In Proceedings of the 41st Annual Conference on Design Automation (pp. 256-259). New York, NY: ACM Press.
-
(2004)
st Annual Conference on Design Automation
, pp. 256-259
-
-
Nollet, V.1
Marescaux, T.2
Verkest, D.3
Mignolet, J.-Y.4
Vernalde, S.5
-
17
-
-
33746930901
-
It's a small world after all: Noc performance optimization via long-range link insertion
-
doi:10.1109/TVLSI.2006.878263
-
Ogras, U. Y., & Marculescu, R. (2006). It's a small world after all: Noc performance optimization via long-range link insertion. IEEE Transactions on Very Large Scale Integration Systems, 14(7), 693-706. doi:10.1109/TVLSI.2006. 878263
-
(2006)
IEEE Transactions on Very Large Scale Integration Systems
, vol.14
, Issue.7
, pp. 693-706
-
-
Ogras, U.Y.1
Marculescu, R.2
-
19
-
-
33845402264
-
Analyzing ultra-scale application communication requirements for a reconfigurable hybrid interconnect
-
Washington, DC: IEEE Computer Society
-
Shalf, J., Kamil, S., Oliker, L., & Skinner, D. (2005). Analyzing ultra-scale application communication requirements for a reconfigurable hybrid interconnect. In Proceedings of the ACM/IEEE Conference on Supercomputing (p. 17). Washington, DC: IEEE Computer Society.
-
(2005)
Proceedings of the ACM/IEEE Conference on Supercomputing
, pp. 17
-
-
Shalf, J.1
Kamil, S.2
Oliker, L.3
Skinner, D.4
-
20
-
-
17644413857
-
Design-space exploration of power-aware on/off interconnection networks
-
Washington, DC: IEEE Computer Society
-
Soteriou, V., & Peh, L.-S. (2004, October). Design-space exploration of power-aware on/off interconnection networks. In Proceedings of the 22nd International Conference on Computer Design (pp. 510-517). Washington, DC: IEEE Computer Society.
-
(2004)
Proceedings of the 22nd International Conference on Computer Design
, pp. 510-517
-
-
Soteriou, V.1
Peh, L.-S.2
-
21
-
-
84891462850
-
A statistical traffic model for on-chip interconnection networks
-
Washington, DC: IEEE Computer Society
-
Soteriou, V., Wang, H., & Peh, L.-S. (2006). A statistical traffic model for on-chip interconnection networks. In Proceedings of the 14th IEEE International Symposium on Modeling, Analysis, And Simulation (pp. 104-116). Washington, DC: IEEE Computer Society.
-
(2006)
Proceedings of the 14th IEEE International Symposium on Modeling, Analysis, and Simulation
, pp. 104-116
-
-
Soteriou, V.1
Wang, H.2
Peh, L.-S.3
-
24
-
-
34548782738
-
Freepdk: An open-source variation-aware design kit
-
Washington, DC: IEEE Computer Society
-
Stine, J. E., Castellanos, I., Wood, M., Henson, J., Love, F., Davis, W. R., et al. (2007). Freepdk: An open-source variation-aware design kit. In Proceedings of the IEEE International Conference on Microelectronic Systems Education (pp. 173-174). Washington, DC: IEEE Computer Society.
-
(2007)
Proceedings of the IEEE International Conference on Microelectronic Systems Education
, pp. 173-174
-
-
Stine, J.E.1
Castellanos, I.2
Wood, M.3
Henson, J.4
Love, F.5
Davis, W.R.6
-
25
-
-
0038041045
-
Throughput-centric routing algorithm design
-
New York, NY: ACM Press
-
Towles, B., Dally, W. J., & Boyd, S. (2003). Throughput-centric routing algorithm design. In Proceedings of the Fifteenth Annual ACM Symposium on Parallel Algorithms and Architectures (pp. 200-209). New York, NY: ACM Press.
-
(2003)
Proceedings of the Fifteenth Annual ACM Symposium on Parallel Algorithms and Architectures
, pp. 200-209
-
-
Towles, B.1
Dally, W.J.2
Boyd, S.3
-
26
-
-
0036053347
-
Analysis of power consumption on switch fabrics in network routers
-
New York, NY: ACM Press
-
Ye, T., Benini, L., & De Micheli, G. (2002). Analysis of power consumption on switch fabrics in network routers. In Proceedings of the 39th Design Automation Conference (pp. 524-529). New York, NY: ACM Press.
-
(2002)
th Design Automation Conference
, pp. 524-529
-
-
Ye, T.1
Benini, L.2
De Micheli, G.3
|