ReNoC: A network-on-chip architecture with reconfigurable topology

Proceedings - Second IEEE International Symposium on Networks-on-Chip, NOCS 2008

Volumn , Issue , 2008, Pages 55-64

  Stensgaard, Mikkel B ^a,b   Sparsø, Jens ^a  

^a TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^b Teklatech   (Denmark)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT-SWITCHING; NETWORK-ON-CHIP ARCHITECTURE; SYSTEM-ON-CHIP (SOC);

BLOCK CODES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERNET PROTOCOLS; ROUTERS; TELECOMMUNICATION LINKS;

MICROPROCESSOR CHIPS;

EID: 44149086425     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NOCS.2008.4492725     Document Type: Conference Paper

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