메뉴 건너뛰기




Volumn 46, Issue 10, 2000, Pages 873-888

Dynamic reconfiguration of node location in wormhole networks

Author keywords

Channel pipelining; Dynamic reconfiguration; Interconnection networks; Wormhole switching

Indexed keywords


EID: 17144463779     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1383-7621(99)00044-2     Document Type: Article
Times cited : (8)

References (33)
  • 2
    • 0346206839 scopus 로고
    • Software tools for developing programs on a reconfigurable parallel architecture
    • D. Grassilloud, J.C. Grossetie (Eds.), T. Node, Kluwer Academic Publishers, Dorderecht
    • Ch. Fraboul, J.Y. Rousselot, P. Siron, Software tools for developing programs on a reconfigurable parallel architecture, in: D. Grassilloud, J.C. Grossetie (Eds.), Computing with Parallel Architectures: T. Node, Kluwer Academic Publishers, Dorderecht, 1991, pp. 101-110.
    • (1991) Computing with Parallel Architectures , pp. 101-110
    • Fraboul, Ch.1    Rousselot, J.Y.2    Siron, P.3
  • 4
    • 0347468043 scopus 로고
    • Reconfigurable transputer processor architectures
    • T.J. Fountain, M.J. Shute (Eds.), North-Holland, Amsterdam
    • D.A. Nicole, Reconfigurable transputer processor architectures, in: T.J. Fountain, M.J. Shute (Eds.), Multiprocessor Computer Architectures, North-Holland, Amsterdam, 1990.
    • (1990) Multiprocessor Computer Architectures
    • Nicole, D.A.1
  • 7
    • 0021379876 scopus 로고
    • Finding maximum on an array processor with a global bus
    • S.H. Bokhari, Finding maximum on an array processor with a global bus, IEEE Trans. Comp. C-33 (2) (1983) 133-139.
    • (1983) IEEE Trans. Comp. , vol.C-33 , Issue.2 , pp. 133-139
    • Bokhari, S.H.1
  • 9
    • 0032001095 scopus 로고    scopus 로고
    • A cost and speed model for k-ary n-cube wormhole routers
    • A.A. Chien, A cost and speed model for k-ary n-cube wormhole routers, IEEE Trans. Parallel and Distributed Sys. 9 (2) (1998).
    • (1998) IEEE Trans. Parallel and Distributed Sys. , vol.9 , Issue.2
    • Chien, A.A.1
  • 10
    • 0023346637 scopus 로고
    • Deadlock-free message routing in multiprocessor interconnection networks
    • W.J. Dally, C.L. Seitz, Deadlock-free message routing in multiprocessor interconnection networks, IEEE Trans. Computers C-36 (5) (1987) 547-553.
    • (1987) IEEE Trans. Computers , vol.C-36 , Issue.5 , pp. 547-553
    • Dally, W.J.1    Seitz, C.L.2
  • 11
    • 0027837827 scopus 로고
    • A new theory of deadlock-free adaptive routing in wormhole networks
    • J. Duato, A new theory of deadlock-free adaptive routing in wormhole networks, IEEE Trans. Parallel and Distributed Systems 4 (12) (1993) 1320-1331.
    • (1993) IEEE Trans. Parallel and Distributed Systems , vol.4 , Issue.12 , pp. 1320-1331
    • Duato, J.1
  • 12
    • 0018518295 scopus 로고
    • Virtual cut-through: A new computer communication switching technique
    • P. Kermani, L. Kleinrock, Virtual cut-through: a new computer communication switching technique, Computer Networks 3 (1979) 267-286.
    • (1979) Computer Networks , vol.3 , pp. 267-286
    • Kermani, P.1    Kleinrock, L.2
  • 13
    • 0016624050 scopus 로고
    • Access and alignment of data in an array processor
    • D.H. Lawrie, Access and alignment of data in an array processor, IEEE Transactions on Comput. C-24 (12) (1975) 1145-1155.
    • (1975) IEEE Transactions on Comput. , vol.C-24 , Issue.12 , pp. 1145-1155
    • Lawrie, D.H.1
  • 15
    • 0022138618 scopus 로고
    • Hot spot contention and combining in multistage interconnect networks
    • G.F. Pfister, V.A. Norton, Hot spot contention and combining in multistage interconnect networks, IEEE Trans. Comp. C-34 (10) (1985) 943-948.
    • (1985) IEEE Trans. Comp. , vol.C-34 , Issue.10 , pp. 943-948
    • Pfister, G.F.1    Norton, V.A.2
  • 17
    • 0020810440 scopus 로고
    • Mesh connected computers with broadcasting
    • Q.F. Stout, Mesh connected computers with broadcasting, IEEE Trans. Comp. C-32 (1983) 826-830.
    • (1983) IEEE Trans. Comp. , vol.C-32 , pp. 826-830
    • Stout, Q.F.1
  • 18
    • 85031789148 scopus 로고
    • Tenor++: A dynamic configurer for supernode machines
    • Springer, Berlin
    • J. Adamo, C. Bonello, Tenor++: a dynamic configurer for supernode machines, in: Lecture Notes in Computer Science, vol. 457, Springer, Berlin, 1990, pp. 640-651.
    • (1990) Lecture Notes in Computer Science , vol.457 , pp. 640-651
    • Adamo, J.1    Bonello, C.2
  • 21
    • 0346837345 scopus 로고
    • DAMP: A dynamic reconfigurate multiprocessor system with a distributed switching network
    • Munich, April
    • A. Bauch, R. Braam, E. Maehle, DAMP: a dynamic reconfigurate multiprocessor system with a distributed switching network, in: The Second European Distributed Memory Computing Conference, Munich, April 1991, pp. 495-504.
    • (1991) The Second European Distributed Memory Computing Conference , pp. 495-504
    • Bauch, A.1    Braam, R.2    Maehle, E.3
  • 22
    • 0346206837 scopus 로고
    • Evaluation des performances de la machine Tnode
    • LIB Besacon
    • F. Desprez, B. Tourancheau, Evaluation des performances de la machine Tnode, La lettre du Transputer, LIB Besacon, No. 7, 1990.
    • (1990) La Lettre du Transputer , vol.7
    • Desprez, F.1    Tourancheau, B.2
  • 25
    • 25744475422 scopus 로고
    • Dynamic reconfiguration of multicomputer networks: Limitations and tradeoffs
    • P. Milligan, A. Nuñez (Eds.), IEEE Computer Soc. Press, Silver Spring, MD
    • J.M. García, J. Duato, Dynamic reconfiguration of multicomputer networks: limitations and tradeoffs, in: P. Milligan, A. Nuñez (Eds.), Euromicro Workshop on Parallel and Distributed Process, IEEE Computer Soc. Press, Silver Spring, MD, 1993, pp. 317-323.
    • (1993) Euromicro Workshop on Parallel and Distributed Process , pp. 317-323
    • García, J.M.1    Duato, J.2
  • 26
    • 25744466964 scopus 로고    scopus 로고
    • Pepe: A trace-driven simulator to evaluate reconfigurable multicomputer architectures
    • Springer, Berlin
    • J.M. García, J.L. Sánchez, P. González, Pepe: a trace-driven simulator to evaluate reconfigurable multicomputer architectures, in: Lecture Notes in Computer Science, vol. 1184, Springer, Berlin, 1996, pp. 302-311.
    • (1996) Lecture Notes in Computer Science , vol.1184 , pp. 302-311
    • García, J.M.1    Sánchez, J.L.2    González, P.3
  • 27
    • 0030394522 scopus 로고    scopus 로고
    • MATRIX: A reconfigurable computing architecture with configurable instruction distribution and deployable resources
    • April
    • E. Mirsky, A. Dehon, MATRIX: A reconfigurable computing architecture with configurable instruction distribution and deployable resources, in: Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, April 1996.
    • (1996) Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
    • Mirsky, E.1    Dehon, A.2
  • 30
    • 25744447525 scopus 로고    scopus 로고
    • Improving the performance of parallel triangularization of a sparse matrix using a reconfigurable multicomputer
    • Springer, Berlin
    • J.L. Sánchez, J.M. García, J. Fernández, Improving the performance of parallel triangularization of a sparse matrix using a reconfigurable multicomputer, in: Lecture Notes in Computer Science, vol. 1041, Springer, Berlin, 1996, pp. 493-502.
    • (1996) Lecture Notes in Computer Science , vol.1041 , pp. 493-502
    • Sánchez, J.L.1    García, J.M.2    Fernández, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.