Difference-equation-based digital frequency synthesizer

Mathematical Problems in Engineering

Volumn 2012, Issue , 2012, Pages

  Ko, Lu Ting ^a   Chen, Jwu E ^a   Shieh, Yaw Shih ^b   Hsin, Hsi Chin ^c   Sung, Tze Yun ^b  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

^b CHUNG HUA UNIVERSITY   (Taiwan)

^c NATIONAL UNITED UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL FREQUENCY SYNTHESIZER; DIRECT DIGITAL FREQUENCY SYNTHESIZER; FREQUENCY SYNTHESIS; HARDWARE COST; NOVEL ALGORITHM; PEAK SIGNAL-TO-NOISE RATIO; SPURIOUS-FREE DYNAMIC RANGE; VLSI IMPLEMENTATION;

DIFFERENCE EQUATIONS; FREQUENCY SYNTHESIZERS;

ALGORITHMS;

EID: 84867951015     PISSN: 1024123X     EISSN: 15635147     Source Type: Journal    
DOI: 10.1155/2012/784270     Document Type: Article

References (42)

1. Chen W., Pouget V., Barnaby H. J., Cressler J. D., Niu G., Fouillat P., Deval Y., Lewis D., Investigation of single-event transients in voltage-controlled oscillators. IEEE Transactions on Nuclear Science 2003 50 6 2081 2087 2-s2.0-1242332786 10.1109/TNS.2003.820766
2. Gardner F. M., Phaselock Techniques 2005 3rd New York, NY, USA Wiley
3. Chang J. Y., Fan C. W., Liang C. F., Liu S. I., A single-PLL UWB frequency synthesizer using multiphase coupled ring oscillator and current-reused multiplier. IEEE Transactions on Circuits and Systems II: Express Briefs 2009 56 2 107 111 2-s2.0-62749191175 10.1109/TCSII.2008.2010181
4. Chung H. H., Chen W., Bakkaloglu B., Barnaby H. J., Vermeire B., Kiaei S., Analysis of single events effects on monolithic PLL frequency synthesizers. IEEE Transactions on Nuclear Science 2006 53 6 3539 3543 2-s2.0-33846290984 10.1109/TNS.2006.886217 (Pubitemid 46113359)
5. Wu T., Hanumolu P. K., Mayaram K., Moon U. K., Method for a constant loop bandwidth in LC-VCO PLL frequency synthesizers. IEEE Journal of Solid-State Circuits 2009 44 2 427 435 2-s2.0-59349115417 10.1109/JSSC.2008.2010792
6. Staszewski R. B., State-of-the-art and future directions of high-performance all-digital frequency synthesis in nanometer CMOS. IEEE Transactions on Circuits and Systems. I. Regular Papers 2011 58 7 1497 1510 10.1109/TCSI.2011.2150890 2857340
7. Zanuso M., Madoglio P., Levantino S., Samori C., Lacaita A. L., Time-to-digital converter for frequency synthesis based on a digital bang-bang DLL. IEEE Transactions on Circuits and Systems. I. Regular Papers 2010 57 3 548 555 10.1109/TCSI.2009.2023945 2751985
8. Staszewski R. B., Vemulapalli S., Vallur P., Wallberg J., Balsara P. T., 1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs 2006 53 3 220 224 2-s2.0-33644996419 10.1109/TCSII.2005.858754
9. Tierney J., Rader C., Gold B., A digital frequency synthesizer. IEEE Transactions on Audio and Electroacoustics 1971 19 1 48 57
10. Bonfanti A., De Caro D., Grasso A. D., Pennisi S., Samori C., Strollo A. G. M., A 2.5-GHz DDFS-PLL with 1.8-MHz bandwidth in 0.35- μ m CMOS. IEEE Journal of Solid-State Circuits 2008 43 6 1403 1413 2-s2.0-44649083087 10.1109/JSSC.2008.922721
11. De Caro D., Napoli E., Strollo A. G. M., Direct digital frequency synthesizers with polynomial hyperfolding technique. IEEE Transactions on Circuits and Systems II: Express Briefs 2004 51 7 337 344 2-s2.0-3542990876 10.1109/TCSII.2004.829553
12. Chen Y. H., Chau Y. A., A direct digital frequency synthesizer based on a new form of polynomial approximations. IEEE Transactions on Consumer Electronics 2010 56 2 436 440 2-s2.0-77954707601 10.1109/TCE.2010.5505951
13. Kang C. Y., Swartzlander E. E., Digit-pipelined direct digital frequency synthesis based on differential CORDIC. IEEE Transactions on Circuits and Systems I: Regular Papers 2006 53 5 1035 1044 2-s2.0-33646536034 10.1109/TCSI.2005.862183
14. De Caro D., Petra N., Strollo A. G. M., High-performance special function unit for programmable 3-D graphics processors. IEEE Transactions on Circuits and Systems. I. Regular Papers 2009 56 9 1968 1978 10.1109/TCSI.2008.2010150 2649817
15. Yang D., Dai F. F., Ni W., Yin S., Jaeger R. C., Delta-sigma modulation for direct digital frequency synthesis. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2009 17 6 793 802 2-s2.0-67349206605 10.1109/TVLSI.2008.2008458
16. Rapinoja T., Stadius K., Xu L., Lindfors S., Kaunisto R., Pärssinen A., Ryynänen J., A digital frequency synthesizer for cognitive radio spectrum sensing applications. IEEE Transactions on Microwave Theory and Techniques 2010 58 5 1339 1348 2-s2.0-77952429544 10.1109/TMTT.2010.2042859
17. McEwan A., Collins S., Direct digital-frequency synthesis by analog interpolation. IEEE Transactions on Circuits and Systems II: Express Briefs 2006 53 11 1294 1298 2-s2.0-34248679804 10.1109/TCSII.2006.882349 (Pubitemid 44824352)
18. Strollo A. G. M., De Caro D., Petra N., A 630 MHz, 76 mW direct digital frequency synthesizer using enhanced ROM compression technique. IEEE Journal of Solid-State Circuits 2007 42 2 350 360 2-s2.0-33847745869 10.1109/JSSC.2006. 889382 (Pubitemid 46374520)
19. Wu Y. D., Lai C. M., Lee C. C., Huang P. C., A quantization error minimization method using DDS-DAC for wideband fractional-N frequency synthesizer. IEEE Journal of Solid-State Circuits 2010 45 11 2283 2291 2-s2.0-77958598997 10.1109/JSSC.2010.2064013
20. Turner S. E., Chan R. T., Feng J. T., ROM-based direct digital synthesizer at 24 GHz clock frequency in InP DHBT technology. IEEE Microwave and Wireless Components Letters 2008 18 8 566 568 2-s2.0-49249106149 10.1109/LMWC.2008.2001025
21. Sung T. Y., Ko L. T., Hsin H. C., Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm. Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS '09) May 2009 249 252 2-s2.0-70350169848 10.1109/ISCAS.2009.5117732
22. Sung T. Y., Hsin H. C., Ko L. T., High-SFDR and multiplierless direct digital frequency synthesizer. WSEAS Transactions on Circuits and Systems 2009 8 6 455 464 2-s2.0-72149097596
23. Cao Y. J., Wang Y., Sung T. Y., A ROM-Less direct digital frequency synthesizer based on a scaling-free CORDIC algorithm. Proceedings of the 6th International Forum on Strategic Technology 2011 Harbin, China 1186 1189
24. Li M., Approximating ideal filters by systems of fractional order. Computational and Mathematical Methods in Medicine 2012 2012 6 365054
25. Li M., Lim S. C., Chen S., Exact solution of impulse response to a class of fractional oscillators and its stability. Mathematical Problems in Engineering 2011 2011 2-s2.0-79251547368 10.1155/2011/657839 657839
26. Li M., Cattani C., Chen S. Y., Viewing sea level by a one-dimensional random function with long memory. Mathematical Problems in Engineering 2011 2011 13 2-s2.0-78650735978 10.1155/2011/654284 654284
27. Bakhoum E. G., Toma C., Specific mathematical aspects of dynamics generated by coherence functions. Mathematical Problems in Engineering 2011 2011 10 2-s2.0-79251537132 10.1155/2011/436198 436198
28. Chen S. Y., Zhang J., Zhang H., Kwok N. M., Li Y. F., Intelligent lighting control for vision-based robotic manipulation. IEEE Transactions on Industrial Electronics 2012 59 8 3254 3263
29. Chen S. Y., Tong H., Cattani C., Markov models for image labeling. Mathematical Problems in Engineering 2012 2012 18 814356 10.1155/2012/814356 2823635
30. Song Y., Kim B., Quadrature direct digital frequency synthesizers using interpolation-based angle rotation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2004 12 7 701 710 2-s2.0-3142708594 10.1109/TVLSI.2004.830921
31. Langlois J. M. P., Al-Khalili D., Novel approach to the design of direct digital frequency synthesizers based on linear interpolation. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 2003 50 9 567 578 2-s2.0-0141885127 10.1109/TCSII.2003.815020
32. De Caro D., Napoli E., Strollo A. G. M., Direct digital frequency synthesizers with polynomial hyperfolding technique. IEEE Transactions on Circuits and Systems II: Express Briefs 2004 51 7 337 344 2-s2.0-3542990876 10.1109/TCSII.2004.829553
33. De Caro D., Strollo A. G. M., High-performance direct digital frequency synthesizers using piecewise-polynomial approximation. IEEE Transactions on Circuits and Systems. I. Regular Papers 2005 52 2 324 337 10.1109/TCSI.2004. 841592 2120480 (Pubitemid 40319468)
34. Yang B. D., Choi J. H., Han S. H., Kim L. S., Yu H. K., An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/A converter. IEEE Journal of Solid-State Circuits 2004 39 5 761 774 2-s2.0-2442572353 10.1109/JSSC.2004.826323
35. Curticapean F., Niittylahti J., A hardware efficient direct digital frequency synthesizer. Proceedings of the IEEE International Conference Electronics, Circuits and Systems (ICECS '01) 2001 Malta 51 54
36. Volder J., The CORDIC trigonometric computing technique. IRE Transactions on Electronic Computers 1959 8 3 330 334
37. Walther J.S., A unified algorithm for elementary functions. Proceedings of the Spring Joint Computer Conference (AFIPS '71) 1971 379 385
38. Sung T. Y., Hsin H. C., Design and simulation of reusable IP CORDIC core for special-purpose processors. IET Computers and Digital Techniques 2007 1 5 581 589 2-s2.0-34548763767 10.1049/iet-cdt:20060075 (Pubitemid 47438079)
39. Hu Y. H., CORDIC-based VLSI architectures for digital signal processing. IEEE Signal Processing Magazine 1992 9 3 16 35 2-s2.0-0026898138 10.1109/79.143467
40. SMIMS Technology Corp.,.
41. Palnitkar S., Verilog HDL-A Guide to Digital Design and Synthesis 2003 2nd Prentice-Hall
42. Xilinx FPGA products,. 2011