High-SFDR and multiplierless direct digital frequency synthesizer

WSEAS Transactions on Circuits and Systems

Volumn 8, Issue 6, 2009, Pages 455-464

  Sung, Tze Yun ^a   Hsin, Hsi Chin ^b   Ko, Lu Ting ^b  

^a CHUNG HUA UNIVERSITY   (Taiwan)

^b NATIONAL UNITED UNIVERSITY   (Taiwan)

Author keywords

DDFS; FPGA; Hybrid CORDIC; SFDR; SoC

Indexed keywords

DATA PATHS; DIRECT DIGITAL FREQUENCY SYNTHESIZER; HARDWARE COST; HYBRID COORDINATE; MULTIPLIERLESS; POWER CONSUMPTION; SOC (SYSTEM ON CHIP); SPURIOUS FREE DYNAMIC RANGE; VLSI IMPLEMENTATION; XILINX FPGA;

DIGITAL COMPUTERS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FREQUENCY SYNTHESIZERS; PROGRAMMABLE LOGIC CONTROLLERS;

MULTICARRIER MODULATION;

EID: 72149097596     PISSN: 11092734     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (16)

1. J. Vankka, "Methods of mapping from phase to sine amplitude in direct digital frequency synthesis," IEEE Proceedings of the Frequency Control Symposium, June 5-7 1996, pp.942-950.
2. S. C. Yi, K. T. Lee, J. J. Chen, C. H. Lin, "A low power efficient direct digital frequency synthesizer based on new two-level lookup table," IEEE Canadian Conference on Electrical and Computer Engineering 2006, May 2006, pp.963-966.
3. D. A. Sunderland, R. A. Srauch, S. S. Wharfield, H. T. Peterson, C. R. Cole, "CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications," IEEE Journal of Solid-State Circuits, Vol.19, No.4, August 1984, pp.497-506.
4. H. T. Nicholas, H. Samueli, B. Kim, "The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects," IEEE 42nd Annual Frequency Control Symposium, June 1-3 1988, pp.357-363.
5. D. D. Caro, E. Napoli, A. G. M. Strollo, "Direct digital frequency synthesizers with polynomial hyperfolding technique," IEEE Transactions of Circuits and Systems-II: Express Briefs, Vol.51, No.7, July 2004, pp.337-344.
6. D. Fu, A. N. Willson, Jr. "A high-speed processor for digital sine/cosine generation and angle rotation" in Proc. 32nd Asilomar Conf. Signals, Systems and Computers, Vol.1 1998, pp.177-181
7. A. Torosyan, D. Fu, A. N. Willson, Jr, "A 300- MHz quadrature direct digital synthesizer/mixer in 0.25-μm CMOS" IEEE Journal of Solid-State Circuits, Volume 38, Issue 6, June 2003 pp. 875 - 887
8. S. Cheng, K. Zhang, S. Cao, X. Zhou, D. Zhou, "A 2.4-GHz ISM Band Delta-Sigma Fractional- N Frequency Synthesizer with Automatic Calibration Technique," WSEAS Transactions on Circuits and Systems, Issue 10, Vol.7, pp.859-868, Oct. 2008
9. I.JIVET, B.DRAGOI, "Performance Analysis of Direct Digital Synthesizer Architecture with Amplitude Sequencing," WSEAS Transactions on Circuits and Systems, Issue 1, Vol.7, pp.1-6, Jan 2008.
10. J. W. Hong, C. L. Hou, C. M. Chang, S. T. Cheng, H. Y. Su, "Current or/And Voltage- Mode Quadrature Oscillators With Grounded Capacitors and Resistors Using FDCCIIs," WSEAS Transactions on Circuits and Systems, Issue 3, Vol.7, pp.129-138, Mar 2008.
11. A. Madisetti, A. Y. Kwentus, A. N. Willson Jr, "A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range," IEEE Journal of Solid-State Circuits, Vol.34, No.8, August 1999, pp.1034- 1043.
12. E. Grayver, B. Daneshrad, "Direct digital synthesis using a modified CORDIC," IEEE International Symposium on Circuits and Systems (ISCAS '98). Vol.5, May 1998, pp.241- 244.
13. C. Y. Kang, E. E. Swartzlander Jr., "Digitpipelined direct digital frequency synthesis based on differential CORDIC," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol.53, No.5, May 2006, pp.1035-1044.
14. Y. H. Hu, S. Naganathan, "An angle recoding method for CORDIC algorithm implementation," IEEE Transactions on Computers, Vol.42, No.1, January 1993, pp.99- 102.
15. T. B. Juang, S. F. Hsiao, M. Y. Tsai, "Para- CORDIC: parallel CORDIC rotation algorithm," IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol.51, No.8, August 2004, pp.1515-1524.
16. " TSMC 0.18 CMOS Design Libraries and Technical Data, v.3.2," Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan, and National Chip Implementation Center (CIC), National Science Council, Hsinchu, Taiwan, R.O.C., 2006.