Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 249-252

  Sung, Tze Yun ^a   Ko, Lyu Ting ^a   Hsin, Hsi Chin ^b  

^a CHUNG HUA UNIVERSITY   (Taiwan)

^b NATIONAL UNITED UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CO-ORDINATE ROTATION DIGITAL COMPUTERS; CORDIC ALGORITHMS; COSINE FUNCTIONS; DATA PATHS; DIGITAL CIRCUIT DESIGN; DIRECT DIGITAL FREQUENCY SYNTHESIZER; LOW POWER; POWER CONSUMPTION; SOC (SYSTEM ON CHIP); SPURIOUS FREE DYNAMIC RANGE; VERY LARGE-SCALE INTEGRATION; XILINX FPGA;

COMPUTER ARCHITECTURE; DIGITAL COMPUTERS; DIGITAL INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FREQUENCY SYNTHESIZERS; INTEGRATED CIRCUIT MANUFACTURE; MULTICARRIER MODULATION;

ALGORITHMS;

EID: 70350169848     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5117732     Document Type: Conference Paper

References (13)

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