An innovative power-gating technique for leakage and ground bounce control in system-on-a-chip (SOC)

Circuits, Systems, and Signal Processing

Volumn 30, Issue 1, 2011, Pages 89-105

  Chowdhury, Masud H ^a   Khaled, Pervez ^a   Gjanci, Juliana ^a  

^a University of Illinois at Chicago   (United States)

Author keywords

Ground bounce; Leakage; Power gating; Sleep transistor; Substrate noise; System on a chip

Indexed keywords

GROUND BOUNCE; LEAKAGE; POWER GATING; SLEEP TRANSISTOR; SUBSTRATE NOISE; SYSTEM-ON-A-CHIP;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; FLUIDIZED BED COMBUSTION; HAND HELD COMPUTERS; PROGRAMMABLE LOGIC CONTROLLERS; TRANSISTORS;

LEAKAGE CURRENTS;

EID: 79952705339     PISSN: 0278081X     EISSN: 15315878     Source Type: Journal    
DOI: 10.1007/s00034-010-9211-7     Document Type: Article

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