A multistage interleaved synchronous buck converter with integrated output filter in 0.18 μm SiGe process

IEEE Transactions on Power Electronics

Volumn 22, Issue 6, 2007, Pages 2164-2175

  Abedinpour, Siamak ^a   Bakkaloglu, Bertan ^b   Kiaei, Sayfe ^b  

^a FREESCALE SEMICONDUCTOR INC   (United States)

^b Arizona State University   (United States)

Author keywords

DC DC power converters; Fully integrated switched mode (SM) dc dc converter; Interleaved synchronous buck converter; Switching circuits; Zero voltage switching; Zero voltage switching (ZVS)

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CONVERTERS; ELECTRIC CURRENTS; ELECTRIC FILTERS; ELECTRIC POTENTIAL; HYSTERESIS; SEMICONDUCTING SILICON COMPOUNDS; SWITCHING CIRCUITS; ZERO VOLTAGE SWITCHING;

FULLY INTEGRATED CONVERTER; MULTISTAGE INTERLEAVED SYNCHRONOUS BUCK CONVERTER; ON-CHIP FILTER INDUCTOR;

DC-DC CONVERTERS;

EID: 36349026369     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2007.909288     Document Type: Article

References (29)

1. J. Wong, "A low noise low dropout regulator for portable equipment," in Proc. Power Conv. Intell. Motion Conf., 1990, pp. 38-43.
2. F. Ueno et al., "Emergency power supply for small computer systems," in Proc. IEEE ISCAS, 1991, pp. 1065-1068.
3. S. Cuk, "Basics of switched-mode power conversion: Topologies, magnetics, and control," Adv. Switched-Mode Power Conv., vol. 2, pp. 279-310, 1981.
4. G. A. Rincon-Mora and P. E. Allen, "Optimized frequency-shaping circuit topologies for LDO's," IEEE Trans. Circuits Syst. II, vol. 45, no. 6, pp. 703-708, Jun. 1998.
5. D. Maksimovic and S. Dhar, "Switched-capacitor dc-dc converters for low-power on-chip applications," in Proc. IEEE Power Electron. Spec. Conf. (PESC), 1999, pp. 54-59.
6. D. K. Su and W. J. McFarland, "An IC for linearizing RF power amplifiers using envelope elimination and restoration," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2252-2258, Dec. 1998.
7. G. Hannington, P. Chen, P. M. Ashbeck, and L. E. Larson, "High-efficiency power amplifier using dynamic power-supply voltage for CDMA applications," IEEE Trans. Microw. Theory Tech., vol. 47, no. 8, pp. 1471-1476, Aug. 1999.
8. T. D. Burd, T. A. Pering, and A. J. Stratakos, "A dynamic voltage scaled microprocessor system," IEEE J. Solid-State Circuits, vol. 35, no. 11, pp. 1571-1580, Nov. 2000.
9. D. J. Kirchgessner et al., "A 0.18 μm SiGe RFBiCMOS technology for wireless and gigabit optical communication applications," in Proc. IEEE BCTM, 2001, pp. 151-154.
10. J. Mitros et al., "High-voltage drain extended MOS transistors for 0.18 μm logic CMOS process," IEEE Trans. Electron Devices, vol. 48, no. 8, pp. 1751-1755, Aug. 2001.
11. E. Pettenpaul et al., "CAD models of lumped elements on GaAs up to 18 GHz," IEEE Trans. Microw. Theory Tech., vol. MTT-36, no. 2, pp. 294-304, Feb. 1988.
12. S. Musunuri et al., "Inductor design for monolithic dc-dc converters," in Proc. IEEE PESC, 2003, pp. 227-232.
13. V. Vorperian, "Quasi-square-wave converters: Topologies and analysis," IEEE Trans. Power Electron., vol. PEL-3, no. 2, pp. 183-191, Mar. 1988.
14. D. Maksimovic, "Design of zero-voltage switching quasi-square-wave resonant switch," in Proc. IEEE Power Electron. Spec. Conf. (PESC) 1993, pp. 323-329.
15. X. Zhou et al., "Investigation of candidate VRM topologies for future microprocessors," IEEE Trans. Power Electron., vol. 15, no. 6, pp. 1172-1182, Jun. 1993.
16. P. Xu et al., "Investigation of candidate topologies for 12 V VRM," in Proc. IEEE APEC, 2002, vol. 1, pp. 686-692.
17. B. Min and S. Kim, "High performance CMOS current comparator using resistive feedback network," Electron. Lett., vol. 34, no. 22, pp. 2074-2076, 1998.
18. D. K. Su et al., "Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits," IEEE J. Solid-State Circuits, vol. 28, no. 4, pp. 420-430, Apr. 1993.
19. M. Mino et al., "A compact buck converter using a thin-film inductor," in Proc. IEEE APEC, 1996, pp. 442-426.
20. S. K. Reynolds, "A dc-dc converter for short-channel CMOS technologies," IEEE J. Solid-State Circuits, vol. 32, no. 1, pp. 111-113, Jan. 1997.
21. S. Sakiyama et al., "An on-chip high-efficiency and low-noise dc-dc converter using divided switches with current control technique," in Proc. IEEE ISSCC, 1999, pp. 156-157.
22. G. Wei and M. A. Horowitz, "A fully digital energy-efficient adaptive power supply regulator," IEEE J. Solid-State Circuits, vol. 34, no. 4, pp. 520-528, Apr. 1999.
23. Y. Katayama et al., "High power density MHz switching monolithic dc-dc converter with thin film inductor," in Proc. IEEE PESC, 2000, pp. 1485-1490.
24. J. Kim and M. A. Horowitz, "An efficient digital sliding controller for adaptive power supply regulation," IEEE J. Solid-State Circuits, vol. 37, no. 5, pp. 639-647, May 2002.
25. K. H. Kim et al., "A megahertz switching dc-dc converter using FeBN thin film inductor," IEEE Trans. Magn., vol. 38, no. 5, pp. 3162-3164, Sep. 2002.
26. P. Hazucha et al., "A 233 MHz 80%-87% efficient four-phase dc-dc converter utilizing air-core inductors on package," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 838-845, Apr. 2005.
27. S. Abedinpour, B. Bakkaloglu, and S. Kiaei, "A multistage interleaved synchronous buck converter with integrated output filter in a 0.18 μm SiGe process," in Proc. IEEE Int. Solid-State Circuit Conf. (ISSCC) Feb. 2006, pp. 356-357.
28. S. Musunuri and P. L. Chapman, "Design of low power monolithic dc-dc buck converter with integrated inductor," in Proc. IEEE PESC, 2005, pp. 1773-1779.
29. A. Richelli et al., "A fully integrated inductor-based 1.8-6 V step-up converter," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 242-245, Jan. 2004.