Distributed sleep transistor network for power reduction

Proceedings - Design Automation Conference

Volumn , Issue , 2003, Pages 181-186

  Long, Changbo ^a   He, Lei ^b  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

^b University of California   (United States)

Author keywords

Design

Indexed keywords

ALGORITHMS; GATES (TRANSISTOR); LEAKAGE CURRENTS; LOGIC CIRCUITS; SWITCHING SYSTEMS;

DISTRIBUTED SLEEP TRANSISTOR NETWORKS (DSTN);

TRANSISTORS;

EID: 0042090410     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775876.775879     Document Type: Conference Paper

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