Analysis of ground bounce in deep sub-micron circuits

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1997, Pages 110-116

  Chang, Yi Shing ^a   Gupta, Sandeep K ^a   Breuer, Melvin A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; INTEGRATED CIRCUIT TESTING; LOGIC GATES; SIGNAL DISTORTION;

GROUND BOUNCE;

BUFFER CIRCUITS;

EID: 0030651637     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)