System level analysis of fast, per-core DVFS using on-chip switching regulators

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2008, Pages 123-134

  Kim, Wonyoung ^a   Gupta, Meeta S ^a   Wei, Gu Yeon ^a   Brooks, David ^a  

^a HARVARD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS; COST BENEFIT ANALYSIS; ELECTRIC POTENTIAL; EMBEDDED SYSTEMS; ENERGY CONSERVATION; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; NANOTECHNOLOGY; VOLTAGE CONTROL; VOLTAGE REGULATORS;

AND MODELS; COMPREHENSIVE ANALYSIS; CONTROL MECHANISMS; DIGITAL SYSTEMS; DVFS SYSTEMS; DYNAMIC VOLTAGE AND FREQUENCY SCALING; LOW POWERS; MICROPROCESSOR CORES; MICROPROCESSOR DESIGNS; MULTI-PROCESSORS; NANO-SECONDS; ON CHIPS; OUTPUT VOLTAGES; OVERALL SYSTEMS; RECENT TRENDS; SWITCHING REGULATORS; SYSTEM LEVELS; VOLTAGE SWITCHING; VOLTAGE TRANSITIONS;

COMPUTER ARCHITECTURE;

EID: 57749178620     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2008.4658633     Document Type: Conference Paper

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