Evaluation of multiple supply and threshold voltages for low-power FinFET circuit synthesis

2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008

Volumn , Issue , 2008, Pages 77-84

  Mishra, Prateek ^a   Muttreja, Anish ^a   Jha, Niraj K ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; FIELD EFFECT TRANSISTORS; JITTER; LEAKAGE CURRENTS; LOGIC CIRCUITS; LOGIC DESIGN; NANOSTRUCTURED MATERIALS; NANOTECHNOLOGY; NETWORKS (CIRCUITS); SWITCHING CIRCUITS; SWITCHING THEORY; TECHNOLOGY; THRESHOLD VOLTAGE; VLSI CIRCUITS;

BULK CMOS; CHANNEL CHARACTERISTICS; CHIP POWER; CIRCUIT EFFICIENCY; CIRCUIT SYNTHESIS; DEEP SUB MICRON TECHNOLOGIES; DEEP SUBMICRON; DELAY CONSTRAINTS; DEVICE AREA; EXPONENTIAL INCREASE; GLOBAL INTERCONNECTS; HSPICE SIMULATIONS; INTERNATIONAL SYMPOSIUM; LEAKAGE POWER; LOW POWERS; LOW-POWER CIRCUITS; MULTIPLE SUPPLY VOLTAGES; NANO-SCALE ARCHITECTURE; POWER EFFICIENCIES; POWER SAVINGS; SUBTHRESHOLD SLOPES; SUPPLY VOLTAGES; THRESHOLD CONTROL; TOTAL POWER CONSUMPTION; VLSI DESIGNS; VOLTAGE LEVELS; VOLTAGE OPTIMIZATION;

ENERGY CONSERVATION;

EID: 51949093138     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANOARCH.2008.4585795     Document Type: Conference Paper

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