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Volumn 2006, Issue , 2006, Pages 399-404

Dependability analysis of nano-scale FinFET circuits

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DESIGN; FINFET CIRCUITS; SOFT ERROR IMMUNITY;

EID: 33749341857     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2006.35     Document Type: Conference Paper
Times cited : (41)

References (16)
  • 1
    • 33751396182 scopus 로고    scopus 로고
    • FinFETs for nanoscale CMOS digital integrated circuits
    • T. King, "FinFETs for Nanoscale CMOS Digital Integrated Circuits", Proceedings of ICCAD, 2005.
    • (2005) Proceedings of ICCAD
    • King, T.1
  • 2
    • 33751414310 scopus 로고    scopus 로고
    • Double-gate SOI devices for low-power and high performance applications
    • K. Roy et al., "Double-Gate SOI Devices for Low-Power and High Performance Applications", Proceedings of ICCAD, 2005.
    • (2005) Proceedings of ICCAD
    • Roy, K.1
  • 10
    • 1542690244 scopus 로고    scopus 로고
    • Soft errors in advanced semiconductor devices-part I: The three radiation sources
    • March
    • R. C. Baumann, "Soft errors in advanced semiconductor devices-part I: the three radiation sources", IEEE Transactions on Device and Materials Reliability, Vol. 1, pp. 17-22, March 2001.
    • (2001) IEEE Transactions on Device and Materials Reliability , vol.1 , pp. 17-22
    • Baumann, R.C.1
  • 11
    • 0034450511 scopus 로고    scopus 로고
    • Impact of CMOS technology scaling on the atmospheric neutron soft error rate
    • Dec.
    • P. Hazucha, and C. Svensson, "Impact of CMOS Technology Scaling on the Atmospheric Neutron Soft Error Rate," IEEE Transactions on Nuclear Science, Vol. 47, No. 6, Dec. 2000.
    • (2000) IEEE Transactions on Nuclear Science , vol.47 , Issue.6
    • Hazucha, P.1    Svensson, C.2
  • 13
    • 0041633858 scopus 로고    scopus 로고
    • Parameter variations and impact on circuits and microarchitecture
    • S. Borkar et al., "Parameter Variations and Impact on Circuits and Microarchitecture", Proceedgins of DAC, 2003.
    • (2003) Proceedgins of DAC
    • Borkar, S.1
  • 14
    • 25144518593 scopus 로고    scopus 로고
    • Process variation in embedded memories: Failure analysis and variation aware architecture
    • September
    • A. Agarwal, B.C. Paul, S. Mukhopadhyay and K. Roy, "Process variation in embedded memories: failure analysis and variation aware architecture" IEEE Journal of Solid-state Circuits, Vol. 40, pp. 1804-1814, September 2005.
    • (2005) IEEE Journal of Solid-state Circuits , vol.40 , pp. 1804-1814
    • Agarwal, A.1    Paul, B.C.2    Mukhopadhyay, S.3    Roy, K.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.