Improving integrated circuit performance through the application of hardness-by-design methodology

IEEE Transactions on Nuclear Science

Volumn 55, Issue 4, 2008, Pages 1903-1925

  Lacoe, Ronald C ^a  

^a AEROSPACE CORPORATION   (United States)

Author keywords

Hardness by design (HBD); Multibit upsets; Single event latchup; Single event transient; Single event upset; Total ionizing dose radiation

Indexed keywords

FOUNDRIES; FOUNDRY PRACTICE; HARDENING; HARDNESS; INTEGRATED CIRCUITS;

HARDNESS-BY-DESIGN (HBD); MULTIBIT UPSETS; SINGLE-EVENT LATCHUP; SINGLE-EVENT TRANSIENT; SINGLE-EVENT UPSET; TOTAL-IONIZING DOSE RADIATION;

RADIATION EFFECTS;

EID: 53349176939     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2008.2000480     Document Type: Conference Paper

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