Statistical pattern recognition and built-in reliability test for feature extraction and health monitoring of electronics under shock loads

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2007, Pages 1161-1178

  Lall, Pradeep ^a   Choudhary, Prakriti ^a   Gupte, Sameep ^a   Suhling, Jeff ^a   Hofmeister, James ^b  

^a AUBURN UNIVERSITY   (United States)

^b Ridgetop Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC ASSEMBLIES; SHOCK LOADS; TIME FREQUENCY ANALYSIS;

BUILT-IN SELF TEST; CONDITION MONITORING; DYNAMIC RESPONSE; FEATURE EXTRACTION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); SERVICE LIFE;

ELECTRONIC EQUIPMENT TESTING;

EID: 35348901911     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.373942     Document Type: Conference Paper

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