A BIST scheme for on-chip ADC and DAC testing

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2000, Pages 216-220

  Huang, Jiun Lang ^a   Ong, Chee Kian ^a   Cheng, Kwang Ting ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

D/A CONVERTERS; DAC TESTING; LEAST SIGNIFICANT BITS; ON CHIPS; ON-CHIP GENERATION; TEST ACCURACY;

DIGITAL INTEGRATED CIRCUITS; EXHIBITIONS;

SOFTWARE TESTING;

EID: 84893701395     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2000.840041     Document Type: Conference Paper

References (8)

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3. K. Arabi and B. Kaminska. Efficient and accurate testing of analog-to-digital converters using oscillation-test method. In European Design and Test Conference, pages 348-52, 1997.
4. S. K. Sunter and N. Nagi. A simplified polynomial-fitting algorithm for DAC and ADC BIST. In International Test Conference, pages 389-95, 1997.
5. R. de Vries, T. Zwemstra, E. M. J. G. Bruls, and P. P. L. Regtien. Built-In Self-Test Methodology for A/D Converters. European Design and Test Conference, pages 353-8, 1997.
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7. B. Dufort and G. W. Roberts. Signal generation using periodic single and multi-bit sigma-delta modulated streams. In International Test Conference, pages 396-405, 1997.
8. M. Mahoney. DSP-Based Testing of Analog and Mixed-Signal Circuits. Computer Society Press. IEEE, Washington, D. C., 1987.