A built-in self-test and diagnosis strategy for chemically assembled electronic nanotechnology

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 23, Issue 2-3, 2007, Pages 131-144

  Brown, Jason G ^a   Blanton, R D ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Fault coverage; Fault diagnosis; Fault diagnostic accuracy; High defect densities; Integrated circuit testing; Logic testing; Nanoelectronics; NanoFabric; Nanofabrication; Reconfigurability; Regular architectures

Indexed keywords

CMOS INTEGRATED CIRCUITS; FAULT TOLERANCE; LOGIC PROGRAMMING; MOLECULAR ELECTRONICS; NANOTECHNOLOGY; SELF ASSEMBLY;

FAULT COVERAGE; FAULT DIAGNOSTIC ACCURACY; HIGH DEFECT DENSITIES; LOGIC TESTING; RECONFIGURABILITY; REGULAR ARCHITECTURES;

INTEGRATED CIRCUIT TESTING;

EID: 34249881596     PISSN: 09238174     EISSN: 15730727     Source Type: Journal    
DOI: 10.1007/s10836-006-0552-x     Document Type: Article

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