On the defect tolerance of nano-scale two-dimensional crossbars

IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2004, Pages 96-104

  Huang, Jing ^a   Tahoori, Mehdi B ^a   Lombard, Fabrizio ^a  

^a Northeastern University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CROSSBARS; DEFECT DENSITY; DEFECT TOLERANCE; FUNCTIONALITY;

COMPUTER SIMULATION; DEFECTS; SELF ASSEMBLY;

NANOTECHNOLOGY;

EID: 24944468878     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFTVS.2004.1347829     Document Type: Conference Paper

References (20)

1. A.Bachtold, P.Harley, T.Nakanishi, C.Dekker, "Logic Circuits with Carbon Nanotube Transistors" Science, vol. 294, pp 1317-1320, 2001.
2. M.Butts, A.DeHon, S.C.Goldstein, "Molecular Eletronics: Devices, Systems and Tools for Gigagate, Gigabit Chips", Proc. International Conference on Computer-Aided Design, pp. 443-440, 2002.
3. C.P. Collier, E.W. Wong, M.Belohradsky, F.M.Raymo, J.F.Stoddart, P.J.Kuekes, R.S.Williams, J.R.Heath, "Electronically Configurable Molecular-Based Logic Gates", Science, vol 285, pp 391-394, 1999.
4. T.H.Cormen, C.E.Leiserson, R.L.Rivest, C.Stein "Introduction to Algorithms", McGraw-Hill, pp. 643-693, 2001.
5. A.DeHon, "Array-Based Architecture for FET-Based, Nanoscale Electronics", IEEE Trans. on Nanotechnology, vol 2, No. 1, pp. 23-32, 2003.
6. A.DeHon, M.J.Wilson, "Nanowire-Based Sublithographic Programmable Logic Arrays", Proc. International Symposium on Field-Programmable Gate Arrays (FPGA2004), pp. 123-132, 2004.
7. A.DeHon, P.Lincoln, J.E.Savage, "Stochastic Assembly of Sublithographic Nanoscale Interfaces", IEEE Trans. on Nanotechnology,vol 2, No. 3, pp. 165-174, 2003.
8. A.DeHon, "Law of Large Numbers System Design", Nano, Quantum and Molecular Computing: Implications to High Level Design and Validation pp. 213-241, 2004.
9. Y.Chen, G.Y.Jung, D.A.A.Ohlberg, X.Li, D.R.Stewart, J.O.Jeppesen, K.A.Nielsen, J.F.Stoddart, R.S.Williams, "Nanoscale molecular-switch crossbar circuits", Nanotechnology, vol 14, pp. 462-468, 2003.
10. Y.Luo, C.P.Collier, J.O.Jeppesen, K.A.Nielsen, E.Delonno, G.Ho, J.Perkins, H.R.Tseng, T.Yamamoto, J.F.Stoddart, J.R.Heath. "Two-dimensional Molecular Electronics Circuits", Chemphyschem, vol 3(6), pp. 519-25, 2002.
11. S.C.Goldstein, M.Budiu, "NanoFabrics: Spatial Computing Using Molecular Electronics", Proc. International Symposium on Computer Architecture, pp. 178-189, 2001
12. S.C.Goldstein, D.Rosewater, "Digital Logic Using Molecular Electronics", IEEE International Solid-State Circuits Conference, Digest of Technical Papers, vol 2, 2002.
13. M.Mishra, S.C.Goldstein, "Defect Tolerance at the End of the Roadmap", Proc. International Test Conference, pp. 1201-1211, 2003
14. Y.Cui, C.M.Lieber, "Functional Nanoscale Electronics Devices Assembled Using Silicon Nanowire Building Blocks", Science, vol 291, pp. 851-853, 2001.
15. Y.Huang, X.Duan, Y.Cui, L.J.Lauhon, K.H.Kim, C.M.Lieber, "Logic Gates and Computation From Assembled Nanowire Building Blocks", Science, vol 294, pp. 1313-1317, 2001.
16. T.Rueckes, K.Kim, E.Joselevich, G.Y.Tseng, C.L.Cheung, C.M.Lieber, "Carbon Nanotube-based Nonvolatile Random Access Memory for Molecular Computing", Science,vol 289(5476), pp. 94-97, 2000.
17. F.Peper, J.Lee, F.Abo, T.Isokawa, S.Adachi, N. Matsui, S.Mashiko, "Fault-tolerance in nanocomputers: a cellular array approach", IEEE Trans. on Nanotechnology,vol 3, No. 1, pp. 187-201, 2004.
18. M.B.Tahoori, S.Mitra, "Defect and Fault Tolerance in Reconfigurable Molecular Computing", Field Custom Computing Machines (FCCM), 2004.
19. P.D.Tougaw, C.S. Lent, "Logical Devices Implemented Using Quantum Cellular Automata", Applied Physics, vol 75(3), pp 1818-1825, 1994.
20. M.M.Ziegler, M.R.Stan, "Design and analysis of crossbar circuits for molecular nanoelectronics", Proc. IEEE International Conference on Nanotechnology, 2002.