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Volumn , Issue , 1998, Pages 89-94

Novel technique for testing FPGAs

Author keywords

[No Author keywords available]

Indexed keywords

MODIFIABILITY; NOVEL TECHNIQUES;

EID: 0001794841     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655841     Document Type: Conference Paper
Times cited : (29)

References (18)
  • 3
    • 0029700925 scopus 로고    scopus 로고
    • An approach for testing programmable/configurable field programmable gate arrays
    • W. K. Huang and F. Lombardi, "An Approach for Testing Programmable/Configurable Field Programmable Gate Arrays," in Proc. of IEEE VLSI Test Symp., pp. 450-455, 1996.
    • (1996) Proc. of IEEE VLSI Test Symp. , pp. 450-455
    • Huang, W.K.1    Lombardi, F.2
  • 7
    • 0029710665 scopus 로고    scopus 로고
    • On the diagnosis of programmable interconnect systems: Theory and application
    • W. K. Huang, X. T. Chen, and F. Lombardi, "On the Diagnosis of Programmable Interconnect Systems: Theory and Application," in Proc. of IEEE VLSI Test Symp., pp. 204-209, 1996.
    • (1996) Proc. of IEEE VLSI Test Symp. , pp. 204-209
    • Huang, W.K.1    Chen, X.T.2    Lombardi, F.3
  • 8
    • 0141873644 scopus 로고    scopus 로고
    • BIST for clbs of a look-up table type fpga-A comparator based bist technique under definite fault models
    • N. Itazaki, Y. Matsumoto, and K. Kinoshita, "BIST for CLBs of a Look-Up Table Type FPGA-A Comparator Based BIST Technique under Definite Fault Models," in Proc. of 3rd IEEE Int. On-Line Testing Work., pp. 202-206, 1997.
    • (1997) Proc. of 3rd IEEE Int. On-Line Testing Work. , pp. 202-206
    • Itazaki, N.1    Matsumoto, Y.2    Kinoshita, K.3
  • 9
    • 0030652669 scopus 로고    scopus 로고
    • Test of rambased fpga: Methodology and application to the interconnect
    • M. Renovell, J. Figueras, and Y. Zorian, "Test of RAMBased FPGA: Methodology and Application to the Interconnect," in Proc. of IEEE VLSI Test Symp., pp. 230-237, 1997.
    • (1997) Proc. of IEEE VLSI Test Symp. , pp. 230-237
    • Renovell, M.1    Figueras, J.2    Zorian, Y.3
  • 11
    • 0030711195 scopus 로고    scopus 로고
    • A fpgabased implementation of a fault tolerant neural architecture for photon identification
    • M. Alderighi, E. Gummati, V. Piuri, and G. Sechi, "A FPGAbased Implementation of a Fault Tolerant Neural Architecture for Photon Identification," in fpga, pp. 166-172, 1997.
    • (1997) Fpga , pp. 166-172
    • Alderighi, M.1    Gummati, E.2    Piuri, V.3    Sechi, G.4
  • 12
    • 84893779586 scopus 로고
    • Photon counting and analog intensified imagers for uv and x-ray radiation
    • E. G. Tanzi, "Photon Counting and Analog Intensified Imagers for UV and X-Ray Radiation," in IFCTR-CNR Tech. Rep., 1995.
    • (1995) IFCTR-CNR Tech. Rep.
    • Tanzi, E.G.1
  • 17
    • 11544310189 scopus 로고
    • CMOS checkers with testable bridging and transistor stuck-on faults
    • C.Metra, M. Favalli, P. Olivo, and B. Ricco, "CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults," in Proc. of IEEE Int. Test Conf., pp. 948-957, 1992.
    • (1992) Proc. of IEEE Int. Test Conf. , pp. 948-957
    • Metra, C.1    Favalli, M.2    Olivo, P.3    Ricco, B.4
  • 18
    • 0031175881 scopus 로고    scopus 로고
    • On-Line detection of bridging and delay faults in functional blocks of cmos self-checking circuits
    • C. Metra, M. Favalli, P. Olivo, and B. Ricco, "On-Line Detection of Bridging and Delay Faults in Functional Blocks of CMOS Self-Checking Circuits," to appear in IEEE Trans. on CAD.
    • IEEE Trans. on CAD
    • Metra, C.1    Favalli, M.2    Olivo, P.3    Ricco, B.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.