Test and diagnosis of faulty logic blocks in FPGAs

IEE Proceedings: Computers and Digital Techniques

Volumn 146, Issue 2, 1999, Pages 100-106

  Wang, S J ^a   Tsai, T M ^a  

^a NATIONAL CHUNG HSING UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; FAULT TOLERANT COMPUTER SYSTEMS; MICROPROCESSOR CHIPS;

HARDWARE OVERHEAD;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0032630356     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:19990532     Document Type: Article

References (11)

1. BROWN, S. D. FRANCIS, R. J. ROSE, and J. VRANESIC, Z. G.: 'Field-programmable gate arrays' (Klmver Academic Publishers, 1992)
2. POMERANZ, I. REDDYM, S. M.: Testability considerations in technology mapping'. Proceedings of 3rd Asian Test symposium, 1994, pp. 151-156
3. LIU, T. HUANG, W. K. LOMBARDl, F.: 'Testing of uncustomized segmented channel FPGAs'. Proceedings of ACM international symposium on FPGAs, 1995, pp. 125-131
4. INOUEM, T. FUJIWARA, H. MICHINISHI, H. YOKOHIRA, T. OKAMOTO, T.: 'Universal test complexity of field-programmable gate arrays'. Proceedings of 4th Asian Test symposium, 1995, pn 259-265
5. HUANG, W. K. LOMBARDI, F.: 'An approach for testing programmable/configurable field programmable gate arrays'. Proceedings of IEEE 14 VLSI Test symposium, 1995, pp. 125-131
6. MICHINISHI, H. YOKOHIRA, T. OKAMOTO, T. INOUE, T. FUJIWARA, H.: 'A test methodology for interconnect structures of LUT-based FPGAs'. Proceedings of 5th Asian Test symposium, 1996, pp. 68-74
7. STROUD, C. KONALA, S. CHEN, P. ABRAMOVICI, M.: 'Built-in self-test of logic blocks in FPGAs'. Proceedings of IEEE 14th VLSI Test symposium, 1996, pp. 387-392
8. PREPARATA, F. P. METZE, G. CHIEN, R. T.: 'On the connection assignment problem of diagnosable systems' IEEE Trans., 1967, EC-16, pp. 848-854
9. HAKIMI, S. L. AMIN, A. T.: 'Characterisation of the connection assignment of diagnosable systems', IEEE Trans., 1974, C-23, pp. 86-88
10. DAHBURA, A. T. MASSON, G. M.: 'An O(n2.5) fault identification algorithm for diagnosable systems', IEEE Trans., 1984, C-33, pp. 486492
11. ABRAMOVICI, M. BREUER, M. A. FRIEDMAN, A. D.: 'Digital systems testing and testable design' (W. H. Freeman and Co., 1990)