Poirot: applications of a logic fault diagnosis tool

IEEE Design and Test of Computers

Volumn 18, Issue 1, 2001, Pages 19-30

  Venkataraman, Srikanth ^a   Drummonds, Scott Brady ^a,b  

^a INTEL CORPORATION   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; DESIGN FOR TESTABILITY; FAILURE ANALYSIS; LOGIC GATES; SEQUENTIAL CIRCUITS;

LOGIC FAULT DIAGNOSIS TOOL; PATH TRACING ALGORITHM; POIROT TOOL; VECTORWISE INTERSECTIONS;

INTEGRATED CIRCUIT TESTING;

EID: 0035126589     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.902819     Document Type: Article

References (9)