Emerging research logic devices

IEEE Circuits and Devices Magazine

Volumn 21, Issue 3, 2005, Pages 37-46

  Zhirnov, Victor V ^a   Hutchby, James A ^a   Bourianoff, George I ^b   Brewer, Joe E ^c  

^a SEMICONDUCTOR RESEARCH CORPORATION   (United States)

^b INTEL CORPORATION   (United States)

^c UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY; CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; MICROELECTRONICS; NANOTECHNOLOGY; RESONANT TUNNELING;

NANOELECTRONICS; QUANTUM CELLULAR AUTOMATA; RESONANT TUNNEL DEVICE; SINGLE ELECTRON TRANSISTOR;

LOGIC DEVICES;

EID: 27844584843     PISSN: 87553996     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCD.2005.1438811     Document Type: Article

References (68)

1. V.V. Zhirnov, R.K. Cavin, J.A. Hutchby, and G.I. Bourianoff, "Limits to binary logic switch scaling - A gedanken model," Proc. IEEE, vol. 91, p. 1934, Nov. 2003.
2. Semiconductor Industry Association (SIA), International Technology Roadmap for Semiconductors, Austin, TX: International SEMATECH, 2003.
3. A.M. Kadin, C.A. Mancini, M.J. Feldman, and D.K. Brock, "Can RSFQ logic circuits be scaled to deep submicron junctions?," IEEE Trans. Appl. Superconduct, vol. 11, p. 1050, Mar. 2001.
4. Y. Naveh, D.V. Averin, and K.K. Likharev, "Physics of high Jc Nb/ AlOx/Nb Josephson junctions and prospects for their applications," IEEE Trans. Appl. Superconduct. vol. 11, p. 1056, Mar. 2001.
5. A.W. Kleinasser, "High performance Nb Joshepson devices for pedaflops computing," IEEE Trans. Appl. Superconduct. vol. 11, p. 1043, Mar. 2001.
6. M. Dorojevets, "An 8-bit FLUX-1 RSFQ microprocessor built in 1.75-μm technology," Physica C, vol. 378, p. 1446, Oct. 2002.
7. D.K. Brock, E.K. Track, and J.M. Rowell, "Superconductor ICs: The 100 GHz second generation," IEEE Spectr., vol. 38, pp. 40-46, Feb. 2000.
8. P.G. Collins and P. Avouris, "Nanotubes for electronics," Sci. Amer., vol. 283, no. 6, pp. 62-69, Dec. 2000.
9. Y. Cui, Z. Zhong, D. Wang, W.U. Wang, and C.M. Lieber, "High performance silicon nanowire field effect transistors," Nano Lett., vol. 3, no. 2, pp. 149-152, 2003.
10. L.J. Lauhon, M.S. Gudiksen, C.L. Wang, and C.M. Lieber, "Epitaxial core-shell and core-multishell nanowire heterostructures," Nature, vol. 420, pp. 57-61, 2002.
11. T. Rueckes, K. Kim, E. Joselevich, G.Y. Tseng, C.L. Cheung, and C.M. Lieber, "Carbon nanotube-based nonvolatile random access memory for molecular computing," Science, vol. 289, no. 6911, pp. 94-97. Nov. 2000.
12. A.M. Song, M. Missous, P. Omling, A.R. Peaker, L. Samuelson, and W. Seifert, "Unidirectional electron flow in a nanometer-scale semiconductor channel: A self-switching device," Appl. Phys. Lett., vol. 83 no. 9, pp. 1881-1883, Sept. 2003.
13. E.K. Heller and F.C. Jain, "Simulation of one-dimensional ring quantum interference transistors using the time-dependent finite-difference beam propagation method," J. Appl. Phys., vol. 87, no. 11, pp. 8080-8087, June 2000.
14. N. Tsukada, M. Gotoda, M. Nunoshita, and T. Nishino, "Nonlinear electron-wave directional coupler," Phys. Rev. B. Condens. Matter, vol. 53, no. 12, pp. R7603-R7606, Mar. 1996.
15. J. Appenzeller and C. Schroer, "Multimode transport in a T-shaped quantum transistor," J. Appl. Phys., vol. 87, no. 6, pp. 3165-3167, Mar. 2000.
16. P.L. McEuen, M.S. Fuhrer, and H.K. Park, "Single-walled carbon nanotube electronics," IEEE Trans. Nanotechnol., vol. 1, pp. 78-85, Mar. 2002.
17. S. Bandyopadhyay, A. Svizhenko, and M.A. Stroscio, "Why would anyone want to build a narrow channel (quantum wire) transistor?," Superlat. Microstr., vol. 27, no. 2-3, pp. 67-76, Feb.-Mar. 2000.
18. V. Derycke, R. Martel, J. Appenzeller, and P. Avouris, "Carbon nanotube inter- and intramolecular logic gates," Nano Lett., vol. 1, no. 9, p. 453, Sept. 2001.
19. Y. Huang, X.F. Duan, Y. Cui, and C.M. Lieber, "Gallium nitride nanowire nanodevices," Nano Lett., vol. 2, no. 2, pp. 101-104, Feb. 2002.
20. S.J. Wind, J. Appenzeller, R. Martel, V. Derycke, and P. Avouris, "Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes," Appl. Phys. Lett., vol. 80, no. 7, pp. 3817-3819, Aug. 2002.
21. A. Javey, Q. Wang, A. Ural, Y.M. Li, and H.J. Dai, "Carbon nanotube transistor arrays for multistage complementary logic and ring oscillators," Nano Lett., vol. 2, no. 9, pp. 929-932, Sept. 2002.
22. A. Bachtold, P. Hadley, T. Nakanishi, and C. Dekker, "Logic circuits with carbon nanotube transistors," Science, vol. 294, no. 5545, pp. 1317-1319, Nov. 2001
23. Nanoelectronics and Information Technology," Rainer Waser, Ed. New York: Wiley-VCH, 2003.
24. D.J. Paul, B. Coonan, G. Redmond, G.M. Crean, B. Holländer, S. Mantl, I. Zozoulenko, and K.F. Berggren, "Silicon quantum integrated circuits," in Future Trends in Microelectronics, S. Luryi, J. Xu, and A. Zaslavsky, Eds. New York: Wiley, 1999, pp. 183-192.
25. M.A. Reed, W.R. Frensley, R.J. Matyi, J.N. Randall, and A.C. Seabaugh, "Realization of a three-terminal resonant tunneling device: The bipolar quantum resonant tunneling transistor," Appl. Phys. Lett., vol. 54, no. 11, p. 1034, Mar. 1989.
26. E.R. Brown, C.D. Parker, A.R. Calawa, M.J. Manfra, C.L. Chen, L.J. Mahoney, W.D. Goodhue, J.R. Soderstrom, and T.C. McGill, "High-frequency resonant-tunneling oscillators," Microwave and Optical Technol. Lett., vol. 4, no. 1, pp. 19-23, Jan. 1991.
27. U. Auer, W. Prost, M. Agethen, F.J. Tegude, R. Duschl, and K. Eberl, "Low-voltage MOBILE logic module based on Si/SiGe interband tunneling devices," IEEE Electron Device Lett., vol. 22, p. 215, May 2001.
28. P. Fay, L. Jiang, Y. Xu, G.H. Bernstein, D.H. Chow, J.N. Schulman, H.L. Dunlap, and H.J. De Los Santos, "Fabrication of monolithically-integrated InAlAs/InGaAs/InP HEMTs and InAs/AlSb/GaSb resonant interband tunneling diodes," IEEE Trans. Electron Devices, vol. 48, p. 1282, June 2001.
29. E.R. Brown and C.D. Parker, "Resonant tunnel diodes as submillimetre-wave sources," Philos. Trans. R. Soc. London A. Math. Phys. Sci., vol. 354, no. 1717, p. 2365, Oct. 1996.
30. R.H. Chen, A.N. Korotkov, and K.K. Likharev, "Single-electron transistor logic," Appl. Phys. Lett., vol. 68, no. 14, p. 1954, Apr. 1996.
31. C.P. Gerousis and S.M. Goodnick, "Simulation of single-electron tunneling circuits," Phys. Solid State, vol. B 233, no. 1, p. 113, Sept. 2002.
32. K. Tsukagoshi, B.W. Alphenaar, and K. Nakazato, "Operation of logic function in a coulomb blockade device," Appl. Phys. Lett., vol. 73, no. 17, p. 2515, Oct. 1998.
33. Y. Ono, Y. Takahashi, K. Yamazaki, M. Nagase, H. Namatsu, K. Kurihara, and K. Murase, "Si complementary single-electron inverter with voltage gain," Appl. Phys. Lett., vol. 76, no. 21, p. 3121, May 2000.
34. Y. Ono, K. Yamazaki, M. Nagase, S. Horiguchi, K. Shiraishi, and Y. Takahashi, "Fabrication of single-electron transistor and circuits using SOIs," Solid-State Electron., vol. 46, p, no. 11, 1723, Nov. 2002.
35. S. Kasai and H. Hasegawa, "GaAs and InGaAs single electron hexagonal nanowire circuits based on binary decision diagram logic architecture," Physica E, vol. 13, no. 2-4, p. 925, Mar. 2002.
36. K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, "Room-temperature single-electron memory," IEEE Trans. Electron Devices, vol. 41, p. 1628, Sept. 1994.
37. M. Saitoh, T. Murakami, and T. Hiramoto, "Large coulomb blockade oscillations at room temperature in ultranarrow wire channel MOSFETs formed by slight oxidation process," IEEE Trans. Nanotechnol., vol. 2, p. 241, Dec. 2003.
38. M. Saitoh and T. Hiramoto, "Room-temperature observation of negative differential conductance due to large quantum level spacing in silicon single-electron transistor," Jpn. J. Appl. Phys. 2, Lett., vol. 43, no. 2A, p. L210, Feb. 2004.
39. C.S Lent, and P.D. Tougaw, "Dynamics of quantum cellular automat," J. Appl. Phys., vol. 80, no. 8, pp. 4722-4736, Oct. 1996.
40. C.S. Lent and P.D. Tougaw, "A device architecture for computing with quantum dots," Proc. IEEE, vol. 85, pp. 541-557, Apr. 1997.
41. C.S. Lent, B. Isaksen, and M. Lieberman, "Molecular quantum-dot cellular automata," J. Amer. Chem. Soc., vol. 125, no. 4, pp. 1056-1063, Jan. 2003.
42. K. Nikolic, D. Berzon, and M. Forshaw, "Relative performance of three nanoscale devices-CMOS, RTDs and QCAs-against a standard computing task," Nanotechnol., vol. 12, no. 1, pp. 38-43, Mar. 2001.
43. L. Bonci, G. Iannaccone, and M. Macucci, "Performance assessment of adiabatic quantum cellular automata," J. Appl. Phys., vol. 89, no. 11, pp. 643-643, June 2001
44. A.O. Orlov, I. Amlani, R.K. Kummamuru, R. Ramasubramaniam, G. Toth, C.S. Lent, G.H. Bernstein, and G.L. Snider, "Experimental demonstration of clocked single-electron switching in quantum-dot cellular automata," Appl. Phys. Lett., vol. 77, no. 1, p. 295, July 2000.
45. A.O. Orlov, R.K. Kummamuru, R. Ramasubramaniam, G. Toth, C.S. Lent, G.H. Bernstein, and G.L. Snider, "Experimental demonstration of a latch in clocked quantum-dot cellular automata," Appl. Phys. Lett., vol. 78, no. 11, p. 1625, Mar. 2001.
46. R.K. Kummamuru, J. Timler, G. Toth, C.S. Lent, R. Ramasubramaniam, A.O. Orlov, G.H. Bernstein, and G.L. Snider, "Power gain in a quantum-dot cellular automata latch," Appl. Phys. Lett., vol. 81, no. 7, p. 1332, Aug. 2002.
47. R.K. Kummamuru, A.O. Orlov, R. Ramasubramaniam, C.S. Lent, G.H. Bernstein, and G.L. Snider, "Operation of a quantum-dot cellular automata (QCA) shift register and analysis of errors," IEEE Trans. Electron Devices, vol. 50, p. 1906, Sept. 2003
48. J. Timler and C.S. Lent, "Power gain and dissipation in quantum-dot cellular automata," J. Appl. Phys., vol. 91, no. 2, p. 823, Jan. 2002.
49. R.P. Cowburn and M.E. Welland, "Room temperature magnetic quantum cellular automata," Science, vol. 28, no. 5457, p. 1466, Feb. 2000.
50. D.A. Allwood et al. "Sumbicrometer ferromagnetic NOT fate and shift register," Science, vol. 296, no. 5575, p. 2003, June 2002.
51. J.C. Ellenbogen and J.C. Love, "Architectures for molecular electronic computers: 1. Logic structures and an adder designed from molecular-electronic diodes," Proc. IEEE, vol. 88, pp. 386-425, Mar. 2000.
52. Y. Wada, "Prospects for single molecule information processing devices," Proc. IEEE, vol. 89, pp. 1147-1771, Aug. 2001
53. R.F. Service, "Next-generation technology hits an early mid-life crisis," Science, vol. 302, no. 5645, p. 556, Oct. 2003.
54. J.M. Tour, L. Cheng, D.P. Nackashi, Y.X. Yao, A.K. Flatt, S.K. St Angelo, T.E. Mallouk, and P.D. Franzon, "NanoCell electronic memories," J. Amer. Chem. Soc., vol. 125, no. 43, p. 13279, Oct. 2003.
55. C.N. Lau, D.R. Stewart, R.S. Williams, and M. Bockrath, "Direct observation of nanoscale switching centers in metal/molecule/metal structures," Nano Lett., vol. 4, no. 10, p. 569, Mar. 2004.
56. Y. Chen, D.A.A. Ohlberg, XM Li, D.R. Stewart, R.S. Williams, J.O. Jeppesen, K.A. Nielsen, J.F. Stoddart, D.L. Olynick, and E. Anderson, "Nanoscale molecular-switch devices fabricated by imprint lithography," Appl. Phys. Lett., vol. 82, no. 4, p. 1610, Apr. 2003.
57. Y. Luo, C.P. Collier, J.O. Jeppesen, K.A. Nielsen, E. Delonno, G. Ho, J. Perkins, H.R. Tseng, T. Yamamoto, J.F. Stoddart, and J.R. Heath, "Two-dimensional molecular electronics circuits," Chem. Phys. Lett., vol. 3, no. 6, p. 519, June 2002.
58. Y. Chen, G.Y. Jung, D.A.A. Ohlberg, X.M. Li, D.R. Stewart, J.O. Jeppesen, K.A. Nielsen, J.F. Stoddart, and R.S. Williams, "Nanoscale molecular-switch crossbar circuits," Nano Technol., vol. 14, no. 4, pp. 462-468 2003
59. M.A. Reed, J. Chen, A.M. Rawlett, D.W. Price, and J.M. Tour, "Molecular random access memory cell," Appl. Phys. Lett., vol. 78, no. 23, p. 3735, June 2001.
60. N.B. Zhitenev, A. Erbe, H. Meng, and Z. Bao, "Gated molecular devices using delf-assembled monolayers," Nano Technol., vol. 14, no. 2, pp. 254-257, Feb. 2003.
61. R. Sato and K. Mizushima, "Spin-valve Transistor with an Fe/Au/Fe (001) base," Appl. Phys. Lett., vol. 79, no. 8, p. 1157, Aug. 2001.
62. S. van Dijken, X. Jiang, and S.S.P. Parkin, "Room temperature operation of a high output current magnetic tunnel transistor," Appl. Phys. Lett., vol. 80, no. 18, p. 3364, May 2002.
63. O.M.J. van 't Erve, R. Vlutters, P.S. Anil Kumar, S.D. Kim, F.M. Postma, R. Jansen, and J.C. Lodder, "Transfer ratio of the spin-valve transistor," Appl. Phys. Lett., vol. 80, no. 20, p. 3787, May 2002.
64. S. van Dijken, X. Jiang, and S.S.P. Parkin, "Giant magnetocurrent exceeding 3400% in magnetic tunnel transistors with spin-valve base layers," Appl. Phys. Lett., vol. 83, no. 5, p. 951, Aug. 2003.
65. S.A. Wolf, D.D. Awschalom, R.A. Buhrman, J.M. Daughton, S. von Molnar, M.L. Roukes, A.Y. Chtchelkanova, and D.M. Treger, "Spintronics: A spin based electronics vision for the future," Science, vol. 294, no. 5545, Nov. 16, 2001.
66. S. Das Sarma, J. Fabian, X.D. Xu, and I. Zutic, "Spin electronics and spin computations," Solid State Commun., vol. 119, no. 4-5, pp. 207-215, 2001.
67. S. Das Sarma, J. Fabian, and I. Zutic, "Spin polarized transport and its applications," Arch. Condens. Matter, vol. 1, p. 1, June 2002.
68. S. Sugahara and M. Tanaka, "A spin metal-oxide-semiconductor field-effect transistor using half-metallic-ferromagnet contacts for the source and drain," Appl. Phys. Lett., vol. 84, no. 13, p. 2307, Mar. 2004.