Room-Temperature Observation of Negative Differential Conductance Due to Large Quantum Level Spacing in Silicon Single-Electron Transistor

Japanese Journal of Applied Physics, Part 2: Letters

Volumn 43, Issue 2 A, 2004, Pages

  Saitoh, Masumi ^a   Hiramoto, Toshiro ^a  

^a INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

Author keywords

Coulomb staircase; Negative differential conductance; Quantum level spacing; Resonant tunneling; Room temperature; Silicon single electron transistor; Ultrasmall dot

Indexed keywords

ANISOTROPY; CHEMICAL VAPOR DEPOSITION; ELECTRON BEAMS; ETCHING; ION BEAM LITHOGRAPHY; QUANTUM THEORY; RESONANT TUNNELING; SEMICONDUCTING SILICON;

COULOMB STAIRCASE; NEGATIVE DIFFERENTIAL CONDUCTANCE; QUANTUM LEVEL SPACING; ROOM TEMPERATURE; SILICON SINGLE-ELECTRON TRANSISTOR; ULTRASMALL DOT;

MOSFET DEVICES;

EID: 1942475759     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.43.l210     Document Type: Article

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