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Volumn , Issue , 2004, Pages 926-935

Data compression for multiple scan chains using dictionaries with corrections

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ENCODING (SYMBOLS); GLOSSARIES; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; REAL TIME SYSTEMS;

EID: 18144408774     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (74)

References (29)
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  • 7
    • 0034994812 scopus 로고    scopus 로고
    • Frequency-Directed Run-Length (FDR) codes with application to system-on-a-chip test data compression
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    • th VLSI Test Symposium, Marina Del Rey, Ca., USA, 2001, pp. 42-43
    • (2001) th VLSI Test Symposium , pp. 42-43
    • Chandra, A.1    Chakrabarty, K.2
  • 8
  • 9
    • 84893771642 scopus 로고    scopus 로고
    • Improving compression ratio, area overhead, and test application time for system-on-a-chip test data compression / decompression
    • Paris, France, March 4-8
    • P. T. Gonciari, B. M. Al-Hashimi, N. Nicolici: Improving Compression Ratio, Area Overhead, and Test Application Time for System-on-a-Chip Test Data Compression / Decompression; Proceedings 2002 Design and Test in Europe, Paris, France, March 4-8, 2002, pp. 604-611
    • (2002) Proceedings 2002 Design and Test in Europe , pp. 604-611
    • Gonciari, P.T.1    Al-Hashimi, B.M.2    Nicolici, N.3
  • 10
    • 0029252184 scopus 로고
    • Built-in test for circuits with scan based on reseeding of multiple-polynomial linear feedback shift registers
    • February
    • S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, and B. Courtois: Built-in Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers; IEEE Trans. on Comp., Vol. 44, No.2, February 1995, pp. 223-233
    • (1995) IEEE Trans. on Comp. , vol.44 , Issue.2 , pp. 223-233
    • Hellebrand, S.1    Rajski, J.2    Tarnick, S.3    Venkataraman, S.4    Courtois, B.5
  • 11
    • 0032318126 scopus 로고    scopus 로고
    • Test vector decompression via cyclical scan chains and its application to testing core-based designs
    • Washington, DC, USA
    • A. Jas, N. A. Touba: Test Vector Decompression via Cyclical Scan Chains and Its Application to Testing Core-Based Designs; Proceedings IEEE International Test Conference, Washington, DC, USA, 1998, pp. 458-464
    • (1998) Proceedings IEEE International Test Conference , pp. 458-464
    • Jas, A.1    Touba, N.A.2
  • 14
    • 0002446741 scopus 로고
    • LFSR-coded test patterns for scan designs
    • Munich
    • B. Koenemann: LFSR-Coded Test Patterns for Scan Designs; Proc. Eur. Test Conf., Munich 1991, pp. 237-242
    • (1991) Proc. Eur. Test Conf. , pp. 237-242
    • Koenemann, B.1
  • 17
    • 3142689875 scopus 로고    scopus 로고
    • 3-Stage variable length continuous-flow scan vector decompression scheme
    • C. V. Krishna, N. A. Touba: 3-Stage Variable Length Continuous-Flow Scan Vector Decompression Scheme; Proc. IEEE VLSI Test Symposium, 2004.
    • (2004) Proc. IEEE VLSI Test Symposium
    • Krishna, C.V.1    Touba, N.A.2
  • 18
    • 0142031627 scopus 로고    scopus 로고
    • Test data compression using dictionaries with selective entries and fixed-length indices
    • October
    • L. Li, K. Chakrabarty, N. A. Touba: Test Data Compression Using Dictionaries with Selective Entries and Fixed-Length Indices; ACM Transactions on Design Automation of Electronic Systems, Vol. 8, No. 4, October 2003, pp. 470-490
    • (2003) ACM Transactions on Design Automation of Electronic Systems , vol.8 , Issue.4 , pp. 470-490
    • Li, L.1    Chakrabarty, K.2    Touba, N.A.3
  • 23
    • 0142184748 scopus 로고    scopus 로고
    • On reducing test data volume and test application time multiple scan chain designs
    • Charlotte, NC, USA
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    • (2003) Proceedings IEEE International Test Conference , pp. 1079-1088
    • Tang, H.1    Reddy, S.M.2    Pomeranz, I.3
  • 24
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    • Altering a Pseudo-Random bit sequence for scan-based BIST
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    • N. A. Touba and E. J. McCluskey: Altering a Pseudo-Random Bit Sequence for Scan-Based BIST; Proc. IEEE International Test Conference, Washington, DC, 1996, pp. 167-175
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    • Touba, N.A.1    McCluskey, E.J.2
  • 27
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    • F. G. Wolff, C. Papachristou: Multiscan-based Test Compression and Hardware Decompression Using LZ77; Proceedings IEEE International Test Conference, Baltimore, MD, October 2002, pp. 331-339
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    • Wolff, F.G.1    Papachristou, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.