Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2001, Pages 42-47

  Chandra, A ^a   Chakrabarty, K ^a  

^a Duke University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; DATA COMPRESSION; EMBEDDED SYSTEMS; ENCODING (SYMBOLS); MICROPROCESSOR CHIPS; MULTIVARIABLE SYSTEMS;

AUTOMATIC TEST EQUIPMENT; FREQUENCY DIRECTED RUN LENGTH CODES; GOLOMB CODES; SYSTEM-ON-A-CHIP DESIGN;

BUILT-IN SELF TEST;

EID: 0034994812     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. Testing embedded-core based system chips
2. Testing ICs: Getting to the core of the problem
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4. Scan vector compression/decompression using statistical coding
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6. Test data compression for system-on-a-chip using Golomb codes
7. System-on-a-chip test data compression and decompression architectures based on Golomb codes
8. Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding
9. Test set compaction algorithms for combinational circuits