Threshold logic circuit design of parallel adders using resonant tunneling devices

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 8, Issue 5, 2000, Pages 558-572

  Pacha, Christian ^a,b   Auer, Uwe ^c   Burwick, Christian ^a,b   Glösekötter, Peter ^a,b   Brennemann, Andreas ^c   Prost, Werner ^c   Tegude, Franz J ^a,c   Goser, Karl F ^a,b  

^a IEEE

^b TU DORTMUND UNIVERSITY   (Germany)

^c UNIVERSITY OF DUISBURG ESSEN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CARRY LOGIC; COMPUTATIONAL COMPLEXITY; FLIP FLOP CIRCUITS; HETEROJUNCTIONS; LOGIC CIRCUITS; MONOLITHIC INTEGRATED CIRCUITS; RESONANT TUNNELING; SEMICONDUCTOR DIODES; THRESHOLD LOGIC;

DYNAMIC LOGIC CIRCUIT; MONOSTABLE BISTABLE TRANSITION LOGIC ELEMENTS; PARALLEL ADDERS; PIPELINED RIPPLE CARRY ADDER; RESONANT TUNNELING DIODES;

LOGIC DESIGN;

EID: 0034289973     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.894161     Document Type: Article

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