Integration of InAlAs/InGaAs/InP enhancement-and depletion-mode high electron mobility transistors for high-speed circuit applications

IEEE Transactions on Electron Devices

Volumn 45, Issue 1, 1998, Pages 338-340

  Mahajan, A ^a   Fay, P ^a   Arafa, M ^a   Adesida, I ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 21744447345     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.658854     Document Type: Article

References (10)

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3. N. Harada, S. Kuroda, T. Katakami, K. Hikosaka, T. Mimura, and M. Abe, "Pt-based gate enhancement-mode InAlAs/InGaAs HEMT's for large-scale integration," in Proc. 3rd Int. Conf. InP and Rel. Mat., 1, pp. 377-380
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6. A. Mahajan, P. Fay, C. Caneau, and I. Adesida, "High-performance enhacement mode high electron mobility transistors (E-HEMT's) lattice matched to InP," Electron. Lett., vol. 32, pp. 1037-1038, 1996.
7. M. Tong, K. Nummila, J.-W. Seo, A. Ketterson, and I. Adesida, "Process for enhancement/depletion-mode GaAs/InGaAs/AlGaAs pseudomorphic MODFET's using selective wet gate recessing," Electron. Lett., vol. 28, pp. 1633-1634, 1992.
8. M. Tong, K. Nummila, A. Ketterson, I. Adesida, C. Caneau, and R. Bhat, "InAlAs/InGaAs/InP MODFET's with uniform threshold voltage obtained by selective wet gate recess," IEEE Electron. Device Lett., vol. 13, pp. 525-527, 1992.
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10. A. Ketterson and H. Morkoc, "GaAs/AlGaAs and InGaAs/AlGaAs MODFET inverter simulations," IEEE Trans. Electron. Devices, vol. ED-33, pp. 1626-1634, 1986.